The research report issued by CICC highlights that the ever-increasing scale of large model parameters, the extended context length, and the implementation of parallel strategies have all contributed to a surge in the demand for inter-card communication. Consequently, the bottleneck within AI infrastructure is transitioning from single-chip computing capabilities to interconnection efficiency, resource scheduling, and system synergy. By expanding high-bandwidth, low-latency interconnection domains and amalgamating computing power with HBM resources, scaling up effectively mitigates the impact of communication bottlenecks on both training and inference efficiency. CICC posits that super nodes are likely to emerge as a significant organizational paradigm for AI computing power, spurring growth in demand and fostering technological advancements in domains such as switching chips and trays, optical interconnection, liquid cooling solutions, and high-power power supplies.