Dbhitek.com

For the first time, a semiconductor foundry with no product of its own has completed the full reliability-qualification process flow for 1,200-volt silicon carbide (SiC) MOSFETs on 8-inch (200mm) wafers — giving independent SiC chip designers access to qualified 8-inch foundry manufacturing without depending on an integrated device manufacturer's captive capacity or building their own fab. South Korean pure-play foundry DB HiTek made the reliability qualification announcement September 9, 2026, via PR Newswire from Seoul, and with it claimed the world's first complete 8-inch SiC foundry process flow.

The company plans to ramp toward volume production in the first half of 2027, putting it on the same timeline as domestic rival SK Keyfoundry — and setting up what amounts to the first contested race between two Korean pure-play foundries for the global fabless SiC customer base.

What Reliability Qualification Actually Means as a Commercial Gate

Completing a "reliability qualification" is not a press release milestone — it is the commercial gate without which customers in safety-critical applications cannot commit production designs to a foundry.

For a MOSFET process, qualification means passing a rigorous battery of standardized stress and lifetime tests: high-temperature reverse bias (HTRB), high-temperature gate bias (HTGB), temperature cycling, power cycling, and short-circuit safe operating area (SCSOA) evaluation. These tests simulate years of real-world operation at high voltage and temperature, confirming that the device's gate oxide and drift region will not degrade in ways that cause failure. Without qualification, a foundry can produce samples, but automotive and industrial customers will not accept those samples into their bill of materials for production programs.

DB HiTek has completed this commercial gate for its second-generation 1,200V SiC MOSFET process. The Gen2 process achieves a specific on-resistance (Rsp) of 2.5 mΩ·cm² or better and a threshold voltage (Vth) of 3V or higher at an on-state gate voltage (Vgs(on)) of 18V. A third-generation process, with a target Rsp of 2.3 mΩ·cm² and a short-circuit withstand time (SCWT) of at least 2.5 microseconds, is in qualification with a PDK release scheduled for November 2026.

What the SiC Foundry Model Changes for Chip Designers

SiC power semiconductor manufacturing has historically been dominated by integrated device manufacturers — companies that grow SiC crystals, process wafers, and sell finished devices under their own product lines. Wolfspeed, STMicroelectronics, Infineon, and onsemi all built their SiC capacity primarily to serve internal product roadmaps, even when they occasionally accepted external wafer starts.

That structure has meant that an independent design house wanting to build SiC chips at 8-inch scale had two options: queue behind an IDM's internal products for foundry access, or build its own fab — an investment of hundreds of millions of dollars that most design companies cannot make. The result, as market analyst Yole Group has noted, is that pure-play foundry participation in SiC remained in the single-digit share of device revenue as recently as 2025.

DB HiTek's announcement creates the third option: a fully qualified, pure-play 8-inch SiC foundry service with Process Design Kits available today. The Gen1 and Gen2 PDKs are already in customers' hands. By using these PDKs — files containing device models, design rules, and simulation parameters needed to create chip layouts for the process — design teams can begin development immediately against a process that has already cleared the commercial gate, rather than waiting for their own qualification cycle. DB HiTek says access to these PDKs can shorten a customer's product development cycle by more than one year.

Why Silicon Carbide and Why 8-Inch Scale Matter Now

SiC has become the preferred semiconductor material for the power electronics that underpin the clean-energy transition. Unlike conventional silicon, SiC has a bandgap of approximately 3.26 electron-volts (eV) — nearly three times silicon's 1.12 eV — allowing transistors built from it to sustain much higher voltages and temperatures before breaking down. The physics translate directly to lower power losses in EV traction inverters, solar and wind power converters, EV fast-charging stations, and industrial motor drives.

Analyst firm Yole Group has tracked the SiC power semiconductor market at approximately $3.4 billion in 2024, with projections to surpass $10 billion within roughly five years, driven primarily by EV platform adoption, fast-charging expansion, and data center power infrastructure.

The industry is currently mid-transition from 6-inch (150mm) to 8-inch (200mm) substrates. Six-inch wafers still dominate active production — a majority of SiC power device revenue runs on 150mm — but the economics of the shift are compelling. A 200mm wafer provides approximately 1.78 times the surface area of a 150mm wafer, translating to roughly twice the die output per wafer run once improved edge utilization is factored in. That productivity uplift is one of the most direct levers available for driving down SiC's historically high per-device cost — a cost gap that has been the primary competitive vulnerability against silicon IGBTs.

What Makes a Pure-Play SiC Foundry Technically Different

The substantive difference between DB HiTek's foundry offering and an IDM's external wafer starts is scope and commitment. An IDM offering external starts typically does so on a process optimized for its own product generations, with capacity allocated after internal demand is satisfied. PDKs may be limited, or exist only for device types the IDM manufactures itself.

DB HiTek, as a pure-play foundry, exists solely to manufacture chips for external customers. It has no internal product lines competing for capacity. The foundry's commercial model requires it to maintain and develop processes that work for the widest possible range of customer designs — which is why the Gen1/Gen2 PDKs are available now, and why the Gen3 PDK release in November 2026 is a committed deliverable rather than an internal R&D milestone.

The specific on-resistance figures DB HiTek has published for its Gen2 process — Rsp of 2.5 mΩ·cm² at 1,200V, Gen3 targeting 2.3 mΩ·cm² — are competitive with the commercial SiC MOSFET market. Leading products from Wolfspeed and STMicroelectronics at 1,200V target Rsp values in the 1.5–3.5 mΩ·cm² range, depending on chip area and generation. The SCWT requirement of 2.5 microseconds in the short-circuit safe operating area is specifically important for motor drive and EV traction inverter applications, where fault conditions must not immediately destroy the switching device.

The Korean Rivalry That Will Define 8-Inch SiC Foundry Market Share

DB HiTek will not hold this position alone for long. SK Keyfoundry — another Seoul-based pure-play 8-inch foundry — acquired SK Powertech, a SiC process specialist, in November 2025, and by March 2026 had announced completion of its SiC platform spanning 450V to 2,300V, securing its first 1,200V customer order. SK Keyfoundry has reported first-generation yields above 90% and is targeting mass production in the first half of 2027 — the same window DB HiTek is targeting.

The key differentiator between the two competitors, at this stage, is process maturity: DB HiTek has completed full reliability qualification and is distributing PDKs; SK Keyfoundry has announced platform development and its first customer order, but has not yet confirmed equivalent reliability qualification completion.

Both companies are racing against a backdrop of significant market disruption: Wolfspeed — the dominant Western SiC substrate and device supplier — filed for Chapter 11 bankruptcy in June 2025, and Renesas subsequently abandoned its SiC program. That disruption has left power semiconductor design companies actively searching for qualified alternative suppliers at scale.

Where Does DB HiTek Go From November?

The November 2026 third-generation PDK release will be the next concrete checkpoint for the DB HiTek SiC program. The Gen3 targets — Rsp of 2.3 mΩ·cm² and SCWT of at least 2.5 microseconds — address the performance specifications required for EV traction and heavy industrial drive applications, which represent the largest volume segments in the 1,200V SiC MOSFET market.

After Gen3 qualification is complete, DB HiTek plans to make the process available to all customers beginning in the second quarter of 2027. For the period between now and that date, established customers already engaged with DB HiTek's BCD and specialty processes will have priority access, followed by a full market opening when volume production capability is confirmed.

DB HiTek has spent nearly three decades building manufacturing maturity in analog and power semiconductor processes — including its 2008 development of the industry's first 0.18-micrometer (μm) BCDMOS process — and its 2023 spin-off of DB GlobalChip as a design division explicitly modeled the company's structure on the pure-play foundry model. The SiC push extends that foundry logic into compound semiconductors at the exact wafer size — 8-inch — where pure-play foundry supply has been structurally absent.

Whether that foundation translates into yield, throughput, and pricing that fabless SiC design houses will commit production to remains the open question as DB HiTek moves from qualification to volume.

Frequently Asked Questions

What does "reliability qualification" mean, and why does it matter for fabless SiC customers?

Reliability qualification is a standardized battery of stress tests — including high-temperature reverse bias, temperature cycling, power cycling, and short-circuit safe operating area evaluation — that a semiconductor process must pass before customers in automotive, industrial, or EV applications will commit production designs to it. These tests are not optional for safety-critical uses: a power converter or motor drive inverter that fails in the field represents a serious reliability risk. Without qualification, a foundry can supply samples, but no volume production commitment follows. DB HiTek's completion of reliability qualification for the Gen2 1,200V SiC MOSFET process means that the commercial gate is cleared — fabless SiC customers can now engage with a known-qualified process rather than waiting for their own qualification cycle, which is why the company estimates the PDKs shorten development time by more than a year.

Why does the 8-inch wafer size matter so much in silicon carbide?

SiC crystal growth is fundamentally different from silicon: growing SiC requires temperatures above 2,000°C (3,632°F) and takes days or weeks per boule, compared to hours for silicon ingots. That makes every increase in wafer diameter a significant economic event. A 200mm (8-inch) SiC wafer has approximately 1.78 times the surface area of a 150mm (6-inch) wafer, which translates to roughly twice the die output per production run after accounting for improved edge utilization. In a material where per-wafer costs are high and production capacity is constrained, that doubling of output per run is the primary lever for driving down the per-chip cost that has historically made SiC devices more expensive than their silicon counterparts.

How does DB HiTek's pure-play SiC foundry model differ from what integrated device manufacturers offer?

Integrated device manufacturers like Wolfspeed, STMicroelectronics, and Infineon developed SiC manufacturing capability primarily for their own product lines. When they accept external wafer starts, capacity is allocated after internal product demand is satisfied, and process design kits may reflect only the device types those companies build internally. DB HiTek, as a pure-play foundry, has no internal product line competing for capacity — its commercial model requires maintaining and developing processes that work for the widest range of customer designs, with full PDK support. For a fabless SiC design company that wants to build 8-inch-scale chips without owning a fab, an IDM's external-start program and a pure-play foundry service represent structurally different propositions.

When will DB HiTek's 8-inch SiC foundry service be open to all customers?

DB HiTek's current process preparations are targeting access for longstanding customers during the third quarter of 2026, with broader availability opening to all customers in the second quarter of 2027. A third-generation PDK with improved specific on-resistance and short-circuit withstand time specifications is scheduled for release in November 2026, and will need to complete its own reliability qualification before the Gen3 process is offered for production designs.