Samsung Electronics' sixth-generation high-bandwidth memory, HBM4, has surpassed $1 billion in revenue within about four months of starting mass production in February — a pace the company and analysts call hard to find precedent for in a new memory product's first year.

The number matters less for its size than for what it signals. Samsung spent the previous HBM generation largely shut out of Nvidia's top tier after its HBM3E chips stumbled on heat-and-power qualification tests, costing it a generation of business. HBM4 is the generation where it bet differently — and a billion dollars in four months is the clearest evidence yet that the bet is working, even though Samsung still sits a distant second in the market.

The Milestone

Industry sources said on June 23 that cumulative HBM4 revenue should exceed $1.2 billion by the end of June, and could top $10 billion this year if Samsung ramps shipments through year-end. Chairman Lee Jae-yong reportedly visited Samsung's HBM production base in Cheonan, South Chungcheong Province, to inspect production and quality — a signal, in the Korean coverage, of how central the business is to the company's turnaround.

What HBM4 Is, and Why the 4nm Bet Matters

To see why the pace is striking, it helps to understand what Samsung built. HBM stacks DRAM chips vertically and places them right beside the AI processor to feed it data fast enough to keep its cores busy — the tightest bottleneck in AI computing, often called the "memory wall." At the bottom of each stack sits a "base die," a logic chip that controls the memory above it, managing reads, writes, and error correction, and largely setting the package's speed and stability. HBM4 widens the data path from 1,024 to 2,048 bits, roughly doubling throughput per stack.

Samsung's distinguishing bet was to build that base die on its own 4-nanometer foundry process — a far more advanced node than the ones used through earlier generations — letting the controller run faster and cooler. That choice is why Samsung was able to certify its HBM4 at 11.7 gigabits per second, about 46% above the industry baseline, with data-transfer capacity 2.7 times the prior generation and 40% better power efficiency, easing the data bottleneck and cutting data centers' power and cooling burden. It is also a vertical-integration play: Samsung is the rare maker that can supply the DRAM, the logic base die, the foundry, and the advanced packaging in-house. The risk is cost and yield, since a leading-edge logic die is expensive — but the payoff is the performance that, after the HBM3E stumble, is exactly the credibility Samsung needed.

Where the Chips Go

The chips go into next-generation AI accelerators, including Nvidia's Vera Rubin NVL72 platform. Each Rubin GPU carries eight HBM4 stacks, for 576 across the rack's 72 GPUs, and all three memory makers — Samsung, SK hynix, and Micron — are certified HBM4 suppliers for the platform, though SK hynix holds the largest allocation.

Still Second, but Narrowing

Samsung still sits second in HBM. SK hynix led with 58% in the first quarter, with Samsung and Micron each at 21%, per Counterpoint Research — but the firm expects the gap to narrow as HBM4 scales. Counterpoint noted that Samsung, as the first company to mass-produce HBM4, should gradually gain share, and KB Securities' Kim Dong-won said Samsung's diversified base of ASIC customers — Broadcom, Google, Amazon, Microsoft, and Meta — should lift shipments sharply next year. Samsung expects HBM revenue to more than triple this year, with half of its second-half HBM revenue coming from HBM4. Analyst projections for the overall market vary: one global investment bank put this year's HBM market at $54.6 billion, up 58%, while others see it higher, and Goldman Sachs projected HBM demand from ASIC-based AI chips will jump 82% this year to a third of the market. Not all analysts agree the gap closes quickly — several expect SK hynix to hold its Nvidia lead through this generation even as Samsung gains.

The Second Prong: UFS 5.0

Samsung also said on June 23 that it developed the industry's first UFS 5.0 mobile storage, built on its ninth-generation V-NAND. It delivers 10.8 gigabytes per second of bandwidth — more than double UFS 4.1 — with over 40% better power efficiency, extending battery life. Mass production starts in the fourth quarter, with the chips bound for flagship smartphones, XR headsets, and AI wearables. "In the on-device AI era, storage has become a core element that determines the AI experience," said Choi Jang-seok, who heads product planning at Samsung's memory business, adding that UFS 5.0 sets a new standard for mobile storage.

Together, the two announcements sketch the same strategy from both ends of the memory business: HBM4 to feed the AI accelerators in the data center, and UFS 5.0 to feed the AI models moving onto the phone in your pocket.

Frequently Asked Questions

What is HBM4?

HBM4 is the sixth generation of high-bandwidth memory, a type of DRAM that stacks memory chips vertically and places them next to an AI processor to supply data fast enough to keep the processor's cores busy. HBM4 widens the memory interface from 1,024 to 2,048 bits, roughly doubling bandwidth per stack over the previous HBM3E generation. It is a critical component for next-generation AI accelerators, such as Nvidia's Vera Rubin platform, where memory bandwidth — not raw compute — is often the factor that limits how fast AI systems can run.

How much HBM4 revenue has Samsung made?

According to industry sources cited on June 23, Samsung's HBM4 sales surpassed $1 billion within about four months of beginning mass production in February 2026 — a pace observers describe as unusually fast for a new memory product. Those sources expect cumulative revenue to exceed $1.2 billion by the end of June, and Samsung's annual HBM4 sales are projected to top $10 billion in 2026 if shipments ramp through the year. The company expects its overall HBM revenue to more than triple this year.

What is a base die in HBM, and why does Samsung's matter?

The base die is the logic chip at the bottom of an HBM stack that controls the memory layers above it — handling reads, writes, and error correction — and largely determines the package's speed and stability. Samsung builds its HBM4 base die on its own advanced 4-nanometer foundry process, a more cutting-edge node than used in earlier generations, which allows the memory to run faster and more efficiently. It also lets Samsung supply the DRAM, base die, foundry, and packaging in-house, though a leading-edge logic die raises cost and yield challenges.

What is UFS 5.0?

UFS 5.0 (Universal Flash Storage 5.0) is the newest standard for mobile storage, and Samsung announced the industry's first such solution on June 23, 2026. Built on Samsung's ninth-generation V-NAND, it delivers sequential read speeds of up to 10.8 gigabytes per second — more than double the previous UFS 4.1 standard — with over 40% better power efficiency in a smaller package. Designed for the on-device AI era, it targets flagship smartphones, XR headsets, and AI wearables, with mass production set to begin in the fourth quarter of 2026 in capacities up to 1TB.