On September 1, Mark Kiehlbauch, Vice President of Micron Technology, pointed out at the Memory Executive Summit of the Taiwan International Semiconductor Show that as the scale of AI model parameters increases from approximately 100 million to 100 trillion, the industry is facing the challenge of the 'memory wall'. To overcome this bottleneck, Micron is developing two new types of memory architectures: near-GPU NAND and tightly coupled DRAM. The near-GPU NAND architecture places high-endurance NAND flash memory either inside the GPU package or on a PCB board adjacent to the GPU, shortening the data access path. Although its cost is higher than that of conventional NAND, it is significantly lower than that of HBM and DRAM, achieving a balance between performance, capacity, and cost. Tightly coupled DRAM serves as an expansion platform for the next decade, addressing the physical limitations of traditional planar DRAM. These technologies are expected to transform the energy consumption landscape of data movement and provide more efficient memory solutions for AI computing.