Huawei’s President of the Semiconductor Business Department, He Tingbo, recently published an article titled ‘Will Huawei’s Tao Chip Overheat?’ on the ChinaXiv platform. The piece directly challenges industry skepticism regarding the supposed inevitable heat generation of 3D stacked chips, using real-world data from the mass-produced Kirin 2026 chip as evidence. The article highlights that the primary source of power consumption in chips stems not from computation itself, but rather from data transmission within the chip. To address this, Huawei has revamped the circuit architecture using LogicFolding technology, which shortens signal transmission distances and minimizes transmission delays. This innovation enhances performance while simultaneously reducing power consumption.

Real-world data from the Kirin 2026 chip demonstrates a 55% increase in transistor density. Under equivalent performance conditions, it also shows a 66% reduction in NPU power consumption, a 58% reduction in GPU power consumption, and a 41% reduction in CPU performance core power consumption. The article underscores that 3D stacking does not inevitably result in overheating; instead, the crux lies in minimizing power consumption through strategic design optimization.