Microchip Technology and Micron Jointly Demonstrate High-Performance PCIe Gen 6 Storage Architecture
3 day ago / Read about 0 minute
Author:小编   

On August 4 (local time), Microchip Technology announced its collaboration with Micron Technology to showcase an end-to-end PCIe Gen 6 storage architecture at the 2026 Global Flash Memory Summit. This solution combines Microchip's Switchtec PCIe Gen 6 switch chips with Micron's 9650 NVMe solid-state drives (SSDs), aiming to deliver higher throughput, lower latency, and scalable connectivity for artificial intelligence (AI), high-performance computing (HPC), and cloud data centers. PCIe 6.0 doubles the bandwidth to 64GT/s per lane, meeting the data demands of high-load AI workloads. Microchip's switch chips are fabricated using a 3nm process technology, support up to 160 lanes, and feature advanced security capabilities. Micron's 9650 SSD offers sequential read speeds of up to 28GB/s, sequential write speeds of up to 14GB/s, random read performance of up to 5.5 million IOPS, and random write performance of up to 900K IOPS, specifically designed for data-intensive applications.

  • C114 Communication Network
  • Communication Home
7 X 24 Track global technological trends
Hot Topic