The optical links connecting GPU clusters in modern AI factories are becoming the binding constraint: not because the networking industry hasn't tried, but because the latest-generation pluggable transceivers top out at 200 gigabits per electrical lane, and adding more switch tiers or more fiber runs compounds latency and power costs faster than it solves the underlying bandwidth problem.

At the Open Compute Project Global Summit here on Monday, Nvidia and Cisco unveiled a new open specification called the Ultra-Dense Small Form Factor Pluggable, or USFP, that doubles the per-lane rate to 400 gigabits and, in its 32-lane configuration, reaches 12.8 terabits of capacity per module — four times the bandwidth density of the best pluggable transceivers currently on the market, and with the same field-replaceable serviceability that co-packaged optics cannot provide.

The OCP Global Summit, which ran through today in San Jose, has become the primary forum where hyperscalers and AI infrastructure vendors negotiate the architecture of the next generation of compute. USFP arrived as the headline specification of this year's show, drawing on a partnership between Nvidia and Cisco — two of the largest Ethernet networking vendors in the AI data center market.

USFP Packs Sixteen 400G Lanes Into One Pluggable Module

The specification's core claim is straightforward but technically significant: the first USFP transceivers will support 400 gigabits per electrical lane — double the 200 Gb/s per lane that defines the current OSFP generation. The initial module configuration packs 16 full-duplex lanes into a footprint comparable to today's Octal Small Form Factor Pluggable modules, delivering 6.4 Tb/s of capacity per direction. A second configuration scales to 32 full-duplex lanes, reaching 12.8 Tb/s aggregate bidirectional throughput per module.

That 4× density improvement over current 1.6T OSFP modules is the headline metric — and it carries real operational weight. Rakesh Chopra, Cisco's silicon SVP, stated at a briefing during OCP that the new module delivers four times the bandwidth density of the leading OSFP 1.6T modules available today.

The power efficiency gain is comparably important: Nvidia and Cisco report an overall power efficiency gain of roughly 1.3× over current 200G-per-lane designs — meaning the industry can move twice as much data per port for only 30 percent more power. At hyperscale, a 1.3× efficiency gain across hundreds of thousands of optical ports compounds into millions of dollars in annual power savings — a figure that matters to every data center operator watching power purchase agreements tighten.

The specification is also designed for future expansion. The lane count can grow beyond 32 within the same physical envelope as silicon and photonic integration advances, meaning early adopters of USFP infrastructure are not betting on a single fixed tier.

Two-Step Connector and 100W Thermal Budget Are the Engineering Keys

Getting to 400 Gb/s per lane in a field-replaceable pluggable module is not a dial that can simply be turned up. It requires rethinking the connector, the thermal architecture, and the signal integrity design simultaneously.

The USFP specification addresses all three. At the connector level, USFP uses a two-dimensional array connector with a two-step insertion design: when a module is inserted into its cage, the mechanical lock engages first, and the high-speed electrical contacts engage only after the module is fully seated. This design reduces mechanical wear on the most critical high-frequency contacts, improves signal integrity at 400G signaling rates, and produces more predictable insertion forces across both 400G and 200G per-lane operating modes. It is a meaningful engineering departure from the edge-card contact style used in current OSFP modules — the sort of connector revision that becomes necessary when doubling the lane rate and cannot be borrowed from the prior generation.

On the thermal side, USFP is designed to dissipate up to 100 watts without embedded cooling inside the transceiver itself. This detail determines whether USFP can be deployed in existing data center chassis or requires new infrastructure. Because the cooling requirement stays at the rack or chassis level — air-cooled or liquid-cooled at the row or rack, not inside each module — USFP transceivers are compatible with both conventional air-cooled designs and next-generation liquid-cooled racks. Operators building toward liquid cooling for their compute nodes do not need to maintain a separate embedded cooling architecture inside every transceiver.

The underlying electrical signaling advance is the move from current 200G-per-lane Pulse Amplitude Modulation 4-level (PAM4) technology to 400G-per-lane speeds, which requires more capable digital signal processing to manage the increased noise sensitivity at higher symbol rates — a challenge the industry has been working toward for several years and that USFP formalizes into a specification.

Field Replaceability Is What CPO Still Cannot Offer

The timing of the USFP announcement is inseparable from the industry's active debate about co-packaged optics, or CPO — an architectural approach that moves the optical engine physically much closer to, or directly onto, the switching ASIC to reduce the length and loss of the electrical interconnect. CPO delivers real power efficiency improvements, targeting roughly 5 to 10 picojoules per bit versus the 15 to 20 picojoules per bit typical of current pluggable modules, and it offers higher bandwidth density through tighter silicon-photonic integration.

Nvidia itself has invested heavily in CPO through its Spectrum-X Photonics and Quantum-X Photonics platforms. But many hyperscale and neocloud operators have deferred CPO adoption for a straightforward operational reason: when a co-packaged optical engine fails, replacing it requires taking a line card or switch offline and, in most current designs, returning the hardware. A failed pluggable transceiver, by contrast, a data center technician can swap in the field in minutes, with no impact on surrounding ports.

USFP does not argue that CPO is wrong. It argues that a parallel path exists — one where bandwidth density and power efficiency converge close enough to CPO's advantage that operators who need field replaceability most are no longer forced to choose between serviceability and scale. If the USFP ecosystem delivers on its specifications, the density gap that has made CPO's tradeoffs worth considering gets substantially narrower.

The USFP specification extends the interoperability work between Nvidia's Spectrum-X and Cisco's Silicon One Ethernet platforms — a commercial dimension that strengthens Cisco's position within Nvidia's reference architectures for AI factories.

Open MSA With TE Connectivity and Amphenol Keeps Supplier Competition Intact

One recurring criticism of next-generation optical interconnect efforts is that they fragment the market, lock buyers into proprietary solutions, and shrink the competitive supply chain that drives cost reduction. Nvidia and Cisco are explicitly positioning USFP against that pattern.

The USFP specification is being developed as an open Multi-Source Agreement industry mechanism, the same framework that produced the SFP, QSFP, and OSFP generations. Connector and module work is already underway with TE Connectivity and Amphenol confirmed as the two initial hardware partners. A shared form factor specification with multiple suppliers is the structural foundation that enables the competitive market and cost trajectory the hyperscale community has come to expect from pluggable optics.

The companies announced the specification at OCP specifically because of the project's track record of producing open, non-proprietary standards that propagate across the hyperscale and neocloud supply chain. Microsoft, AMD, Alibaba Cloud, and Supermicro were named as OCP ecosystem participants at the OCP announcement. No commercial availability date has been announced, and interoperability qualification is ahead.

Silicon One G302 and Live Protect for SONiC Round Out Cisco's OCP Announcements

USFP was the summit headline, but Cisco used OCP 2026 to make broader AI networking announcements across silicon, systems, and software.

The company unveiled the Silicon One G302, a 51.2 Tb/s top-of-rack switching ASIC with 256 × 200G SerDes lanes and 1.6T OSFP optical interface support, with initial customer shipments scheduled before year-end 2026. The previously announced Silicon One G300, at 102.4 Tb/s, is now shipping in Cisco 8000 and Nexus 9000 series platforms. Cisco's Silicon One P200 is in production deployment at Microsoft and Alibaba Cloud.

On the security side, Cisco announced Live Protect for SONiC, a runtime vulnerability shielding capability for its validated Software for Open Networking in the Cloud deployments. The system injects compensating policy controls into live switching infrastructure without requiring a reboot — a capability that becomes increasingly important as the window between vulnerability disclosure and active exploitation has narrowed from months to days. Live Protect is slated for mid-2027 availability in Cisco-validated SONiC environments.

When Can Data Centers Actually Buy USFP Transceivers?

The most important caveat about USFP: neither Nvidia nor Cisco announced 400G-per-lane switch ASICs at OCP Global Summit 2026. USFP is currently a specification under development ahead of the switching silicon it will ultimately require to operate at full capacity. The companies are signaling a roadmap and assembling an ecosystem — not shipping a complete end-to-end solution.

The milestones that matter are: ratification of the open MSA specification, arrival of compliant switch silicon from Cisco, Nvidia, or their peers, and successful independent interoperability testing across multiple module vendors. Until those are complete, USFP is a technology direction, not a procurement decision. For operators actively planning AI cluster expansions for 2026 and 2027, USFP's relevance is primarily architectural — it changes what to design for, and which cage infrastructure to invest in ahead of the module supply.

The appetite for exactly this kind of density leap was visible throughout the OCP show floor this week. As AI inference demand continues to compound faster than conventional infrastructure can scale, the case for a pluggable path to 12.8 Tb/s per module — one that preserves the operational model hyperscalers have refined for more than a decade — is one the industry has been waiting to make credibly.

Frequently Asked Questions

What is USFP, and how is it different from OSFP?

USFP — Ultra-Dense Small Form Factor Pluggable — is a new open optical transceiver specification announced by Nvidia and Cisco at the OCP Global Summit 2026. It targets 400 gigabits per lane compared to the 200 Gb/s per lane supported by current OSFP (Octal Small Form Factor Pluggable) modules. This delivers up to four times the bandwidth density in roughly the same physical footprint. OSFP tops out at 1.6 Tb/s aggregate; USFP targets 6.4 Tb/s in its 16-lane configuration and 12.8 Tb/s in its 32-lane configuration. Like OSFP, USFP transceivers are independently field-replaceable modules, meaning a failed module can be swapped without taking surrounding ports or a line card offline.

How does USFP compare to co-packaged optics for AI data centers?

Co-packaged optics (CPO) moves the optical engine close to or onto the switching ASIC to reduce electrical signal loss, targeting roughly 5 to 10 picojoules per bit in power consumption versus 15 to 20 picojoules per bit for current pluggable modules. CPO offers real density and power advantages — Nvidia's own Spectrum-X Photonics and Quantum-X Photonics are CPO implementations. USFP's case is not that CPO is wrong, but that it imposes a serviceability cost: failed CPO optical engines typically require taking a line card or switch offline rather than a field swap. USFP, with its 1.3× power-efficiency improvement over current pluggables and 4× bandwidth-density gain, narrows the gap enough that operators prioritizing operational flexibility have a credible pluggable path forward without accepting the bandwidth constraints that have defined OSFP. The two architectures are parallel paths, not a forced choice.

When will USFP transceivers be commercially available?

No commercial availability date has been announced. As of the OCP Global Summit 2026 announcement, USFP is a specification in development toward an open Multi-Source Agreement. Connector and module work is underway with TE Connectivity and Amphenol, and the specification must be ratified before compliant products reach the market. Critically, no 400G-per-lane switch ASICs have been announced yet, which means the full USFP ecosystem — switch silicon, modules, and qualified interoperability — is a roadmap, not an imminent procurement option. Operators should track MSA ratification milestones and Cisco's G302 chip shipments (targeted before year-end 2026) as early ecosystem signals.

Why does AI networking specifically need higher bandwidth density in pluggable optics?

AI training and inference workloads move data between GPUs and their interconnect fabric at scales that conventional optical infrastructure was not designed to handle. A cluster of tens of thousands of GPUs running a large training job may require every GPU to communicate with hundreds of others at near-line rate. The optical layer — the transceivers connecting GPU servers to switches and switches to each other — becomes the constraint when per-port bandwidth is fixed. Adding more switch tiers to compensate increases latency, consumes power, and multiplies operational complexity. The alternative is scaling the optical layer itself: more bandwidth per port means fewer switch tiers and lower total power consumption for the fabric. That is what drives the transition from 1.6T OSFP to USFP's 6.4T and 12.8T capacity targets.