Fault-tolerant quantum simulation just got dramatically cheaper to run. On June 1, QuEra Computing and Los Alamos National Laboratory published a new architecture in PRX Quantum that delivers up to 250 times faster execution and roughly half the physical qubits of conventional fault-tolerant approaches — without requiring the two most expensive intermediate steps that have kept practical quantum simulation out of reach on near-term hardware. Two days ago, on June 23, a follow-on preprint extended those gains further, showing the same design can simulate quantum systems on as few as 1,500 physical qubits. The team will walk through both papers in a live webinar scheduled for July 1 at 4:00 PM ET.

The key insight driving both papers is that neutral atoms — the hardware platform QuEra builds on — offer something fixed-connectivity quantum processors cannot: the ability to physically rearrange qubits in real time. That reconfigurability is not a convenience feature. It is what makes the entire overhead reduction possible. A reader who understands only "250× faster" without understanding that this advantage is hardware-specific to reconfigurable platforms has a fundamentally incomplete picture of what QuEra has published.

Why Fault-Tolerant Quantum Simulation Costs So Much Today

Any useful quantum computer must protect its calculations from the continuous noise that corrupts individual qubits. Quantum error correction does this by spreading the information of one reliable "logical qubit" across many physical qubits, continuously monitoring the array for errors, and correcting them before they cascade. This protection comes at a price.

Standard fault-tolerant architectures impose two compounding overhead layers on top of that basic error correction cost. The first is magic state distillation — a multi-stage process that takes many noisy copies of a special quantum resource state and refines them into high-fidelity versions usable for computation. Preparing these states through repeated purification cycles consumes a large fraction of a system's qubit budget and runtime. The second overhead layer is discrete gate synthesis: because the simulation's natural rotation angles do not align with the standard gate library, each small-angle rotation must be assembled from sequences of simpler gates, a process whose cost scales logarithmically with the required precision.

For quantum simulation of materials and chemistry — the regime where quantum hardware is most likely to deliver genuine advantage over classical supercomputers — these two overheads compound. The relevant circuits are dominated by many small-angle rotations, so both penalties apply simultaneously and multiply against each other. A computation that would otherwise require 60 clock cycles on ideal hardware can demand orders of magnitude more on a fully fault-tolerant machine running standard overhead.

How STAR Removes Both Bottlenecks at Once

The architecture QuEra calls transversal STAR — for Space-Time Efficient Analog Rotation — sidesteps both overhead layers by exploiting the physics of the simulation workload rather than flattening it into a generic computation.

Instead of distilling magic states through repeated purification cycles, STAR prepares small-angle rotation states directly. A logical magic state of the form |θ⟩ is assembled by applying a pattern of physical Z rotations across the qubits that collectively support the logical operator, then using one or two rounds of syndrome extraction to postselect out any incorrect rotation pieces. The result is consumed by a quantum teleportation circuit to apply the rotation to the data qubits. Because typical simulation angles in the range of 10⁻² to 10⁻³ radians produce a logical error rate that scales proportionally with both the angle and the physical hardware error rate — rather than depending on code distance — the process reaches megaquop-level fidelity without requiring a large code distance at all.

Transversal Clifford gates — the second major overhead category in standard architectures — are handled by exploiting neutral atoms' native ability to physically shuttle atoms and perform operations in parallel across the whole code block in a single pass. This replaces the lattice-surgery approach used on fixed-connectivity hardware, which requires approximately d syndrome rounds per Clifford gate (where d is the code distance), plus dedicated logical ancilla area for routing. On neutral-atom hardware with the STAR layout, a transversal gate requires approximately one syndrome round regardless of code distance, eliminating both the time penalty and the routing overhead simultaneously.

The concrete result, from circuit-level simulations with a hardware-realistic noise model at a physical error rate of 10⁻³, is that a representative megaquop-scale simulation step — an 8×8 Ising model — completes in approximately 60 clock cycles with roughly 15,500 physical qubits using a surface error-correcting code, compared to the conventional fully fault-tolerant approach that would require between 10⁶ and 10⁷ T-gates and a proportionally larger machine.

The Follow-On Paper Cuts Qubits by Another Factor of Five

The June 23 preprint from QuEra researchers and colleagues at Harvard and MIT extends the original STAR architecture by replacing its surface-code foundation with high-rate quantum low-density parity-check (qLDPC) codes. Where a surface code at code distance 9 encodes one logical qubit into 81 physical qubits, high-rate qLDPC codes can encode a constant fraction of logical qubits per physical qubit — typically 10 to 20 physical qubits per logical one in current practical constructions.

The specific code family the follow-on paper uses is self-dual bivariate bicycle codes, chosen for mathematical symmetry properties that are not incidental. The codes must satisfy three structural requirements simultaneously to work with STAR's parallel transversal gateset: they must support shift (cyclic) automorphisms that behave like lattice translations on the logical structure; they must have ZX self-duality to enable global single-qubit Clifford gates; and their logical operator representatives must be supported on disjoint subsets of physical qubits, making the analog rotation injection completely parallel. These symmetry conditions turn out to be well-matched to how neutral atoms move and interact — all key operations reduce to cyclic-shifting moves performed by acousto-optic deflectors, which are hardware-native and highly parallel on neutral-atom platforms.

The practical consequence of integrating qLDPC codes into STAR is that the qubit count for the same 8×8 Ising model simulation drops from 15,500 to approximately 3,000 qubits — or as low as 1,500 qubits per single calculation. Clock cycle counts remain comparable at 60 to 130 cycles. The net comparison against fixed-connectivity fully fault-tolerant architectures is approximately 250 times faster with about ten times fewer qubits when combining both the transversal STAR and the high-rate qLDPC improvements together.

What This Architecture Cannot Do — and Why That Constraint Is Intentional

The explicit design constraint of STAR is also its clearest limitation: the architecture does not provide universal fault-tolerant quantum computation. It is purpose-built for structured simulation of local Hamiltonians — the class of quantum systems where the interactions between components are local, such as materials on a lattice, condensed-matter models, and quantum chemistry problems built from a spatial geometry.

The paper is direct about this tradeoff. STAR's small-angle injection layer remains only partially fault-tolerant because its fidelity does not improve with code distance the way a fully fault-tolerant component would. This sets a natural operating point — beyond a certain code distance, increasing d is no longer beneficial. That is the design logic, not an oversight. For the specific class of simulation problems that STAR targets, the partially fault-tolerant injection is entirely adequate. For general-purpose quantum algorithms with arbitrary circuit structure — including the cryptographically relevant algorithms that dominate discussions of long-term quantum computing risk — the overhead of full fault tolerance remains necessary and STAR would not apply.

The qLDPC extension introduces a parallel constraint: arbitrary logical computation on qLDPC codes remains hard. The follow-on paper achieves its efficiency gains precisely because structured quantum simulation on a lattice needs only a limited, parallel transversal gateset — not the full universal gate set. Extending STAR's approach to general computation would require solving the broader problem of efficient logical operations on qLDPC codes, which remains an open research problem.

What Reconfigurable Connectivity Makes Possible That Fixed Hardware Cannot

The performance claims in both papers are benchmarked against fixed-connectivity fully fault-tolerant architectures. That comparison is deliberate. When STAR was first proposed, before the transversal variant, it was implemented on fixed-connectivity hardware and the gains were substantially smaller — roughly 10 times slower and twice the size compared to neutral-atom transversal STAR. The reconfigurable connectivity of neutral atoms is not one feature among many; it is the mechanism that converts the theoretical advantage of transversal gates into a practical architecture.

On a fixed-connectivity device, logical Clifford gates require lattice surgery: building, connecting, and destroying logical patches across a fixed physical grid, a process that is inherently sequential and spatially expensive. On neutral-atom hardware, atoms are physically shuttled between sites during computation, which means the connectivity graph changes with each operation. Logical operations that would require many steps on fixed hardware collapse to single transversal passes on neutral-atom hardware. This is why the 250× comparison is specifically stated against fixed-connectivity architectures — and why a superconducting or trapped-ion system would need to adopt reconfigurable connectivity to match it.

Where STAR Fits in QuEra's Broader Roadmap

The STAR architecture is designed for QuEra's next major system. In June 2026, QuEra announced Libra, its first fault-tolerant quantum computer, targeting availability on Amazon Braket through Amazon Web Services in 2028. Libra is designed as a megaquop-class system with more than 256 error-corrected logical qubits and a logical error rate of 10⁻⁶. The STAR architecture was co-designed for exactly this class of neutral-atom hardware, and the qubit counts it requires — 10,000 to 15,000 for the surface-code version, under 3,000 for the qLDPC version — are within the range Libra is intended to provide.

The original STAR paper was presented at the QEC 2026 international quantum error correction conference, which ran June 7–12 in Santa Barbara. Multiple papers from the Harvard-QuEra collaboration on qLDPC codes were featured there, reinforcing the trajectory from last year's four Nature papers on neutral-atom fault tolerance toward architecture-level results that combine hardware advances with algorithm co-design.

The research team will present both the transversal STAR paper and the high-rate qLDPC follow-on in a live technical walkthrough and Q&A on July 1 at 4:00 PM ET. Registration is available through QuEra's website.

What Does Megaquop-Scale Quantum Simulation Actually Enable?

The megaquop threshold — one million reliable logical operations — is where the scientific community expects quantum hardware to begin outpacing classical supercomputers on problems of genuine practical importance. These include modeling the magnetic properties of candidate battery materials atom by atom, simulating the non-equilibrium quantum dynamics that govern certain chemical reactions too fast or too complex for classical methods, and exploring condensed-matter physics problems, such as strongly correlated electron systems, that have resisted analytical solution for decades.

The original transversal STAR paper shows that a simulation volume — the product of logical qubit count and characteristic evolution time — of approximately 600 to 1,000 is achievable with the architecture. For comparison, current noisy intermediate-scale quantum devices can reach a simulation volume of roughly 1 to 10 before errors dominate. Standard fully fault-tolerant approaches targeting the same megaquop-scale simulation would require between 10⁶ and 10⁷ T-gates, a resource count that translates to machines of a scale not expected until the early 2030s at the earliest. STAR's architectural approach redraws that timeline, not by building a bigger machine, but by doing the same computation with the hardware that is already being planned.

Frequently Asked Questions

How does fault-tolerant quantum simulation work, and what does the STAR architecture change about it?

Fault-tolerant quantum simulation encodes each logical qubit across many physical qubits and uses error-correction cycles to protect the computation from hardware noise. Standard approaches require two additional overhead layers on top of basic error correction: magic state distillation (purifying noisy resource states through repeated rounds) and discrete gate synthesis (assembling arbitrary rotation angles from a standard gate library). STAR removes both layers for simulation workloads by injecting small-angle rotation states directly — exploiting the fact that simulation circuits are dominated by small rotations — and by using neutral atoms' reconfigurable connectivity to perform Clifford gates transversally rather than through lattice surgery. The result is up to 250 times faster execution with roughly half the qubit count of conventional approaches.

What is magic state distillation, and why does eliminating it matter so much?

Magic state distillation is a process that takes many noisy copies of a quantum resource state and refines them into a smaller number of high-fidelity versions, which are then consumed to apply the non-Clifford gates that give quantum computers their computational advantage beyond what classical machines can efficiently simulate. Distillation is the dominant overhead in most fault-tolerant architectures, consuming the majority of a system's qubit budget and runtime on distillation factories before any useful computation begins. STAR replaces distillation for simulation workloads with a direct analog injection protocol that prepares small-angle rotation states using only physical rotations and postselection — a process that runs at the same architectural scale as the rest of the computation rather than as a separate factory. This is the single change most responsible for the architecture's qubit and time savings.

What is a megaquop quantum computer, and when might one exist?

A megaquop quantum computer is one capable of executing one million reliable logical quantum operations — the threshold at which simulation of materials, quantum chemistry, and non-equilibrium dynamics becomes genuinely out of reach for classical supercomputers. The term was coined by physicist John Preskill. QuEra's Libra system, targeted for availability on Amazon Braket in 2028, is designed to reach megaquop-class performance with more than 256 error-corrected logical qubits. The STAR architecture is co-designed for exactly that class of hardware, and the resource counts it requires — as few as 1,500 physical qubits for single calculations in the qLDPC version — place practical quantum simulation within the range of systems being built now, rather than machines that require further breakthroughs to construct.

Does STAR's advantage work on any quantum hardware, or only on neutral atoms?

The 250× speedup applies specifically to reconfigurable-connectivity platforms, of which neutral-atom systems are currently the leading example. The mechanism that enables the speedup — performing Clifford gates transversally rather than through lattice surgery — requires the ability to physically rearrange qubit positions during computation so that any qubit can interact with any other. Fixed-connectivity hardware such as superconducting processors, where qubits are wired to fixed neighbors, cannot perform transversal Clifford gates in this way without significant additional overhead. The follow-on paper's qLDPC gains are similarly tied to the parallel, shuttling-based operations native to neutral atoms. A superconducting or trapped-ion system with native reconfigurable connectivity could in principle access similar advantages, but no such system currently operates at the scale needed to implement the full STAR architecture.