Mingxin Qirui has officially announced the successful tape-out of its inaugural high-density, large-capacity RRAM chip, named Taishan No.1. Developed along the 1TnR technology trajectory, this chip leverages a 28nm CMOS process platform and incorporates a 1T4R cell architecture. These features enable it to achieve a remarkable 1Gb capacity on a single chip, boast a density of up to 30Mb/mm², and deliver an access latency of less than 20ns. Additionally, the chip integrates on-chip hardware error correction circuitry, facilitating a harmonious balance between large capacity, high density, and rapid read speeds.

The development of the Taishan No.1 chip is rooted in the technical prowess of Academician Liu Ming’s team at the Chinese Academy of Sciences. Through a series of groundbreaking independent innovations, the team has successfully surmounted the key technical hurdles associated with large-capacity 1TnR-structured RRAM chips. As a result, the chip offers a comprehensive suite of advantages, including high performance, high density, high reliability, and low power consumption.

Presently, the Taishan No.1 chip is undergoing rigorous verification processes. This milestone represents a systematic breakthrough by Mingxin Qirui in the realm of key circuit technologies for large-capacity on-chip RRAM chips, solidifying its position as a leader in this cutting-edge field.