On November 12, 2025, Tower Semiconductor, one of the world's top ten wafer foundry companies, announced the launch of its CPO Foundry technology, extending the 300mm wafer bonding technology originally used for stacked back-illuminated image sensors to the field of high-speed optical interconnects. This technology constructs a fully integrated 3D-IC architecture by combining silicon photonics (SiPh) with silicon-germanium (SiGe) heterogeneous wafers, where SiPh is used for the photonic integrated circuit (PIC) in the CPO system, and SiGe is used for the electronic integrated circuit (EIC), achieving a compact and high-performance integration solution. Tower has verified the precise alignment and reliability of the wafer bonding process and received technical support from Cadence in terms of simulation verification reference flows, providing a new technological pathway for emerging application areas such as co-packaged optics (CPO).