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Every superconducting quantum computer built today has a hidden infrastructure problem: for each fragile qubit operating at 15 millikelvin (−459.64°F) inside a dilution refrigerator, a dedicated cable must run from the processor all the way out to room-temperature electronics. That cable carries a control pulse in, a readout signal out, and — because room temperature is warmer than the qubit environment — a trickle of heat in a direction no quantum engineer wants it to go. At the hundreds of qubits achievable today, the interior of a modern dilution refrigerator already looks like a metallic jungle gym. At the hundreds of thousands of qubits researchers agree are necessary for fault-tolerant quantum computers capable of real-world utility, the cable problem becomes a physical wall.

Finnish startup S-Transistors, which emerged from stealth on August 31, 2026, is betting that the wall has a specific answer: move the control electronics inside the cryostat, right next to the qubit chip, using a new class of integrated circuit that can operate at millikelvin temperatures without the one property that makes conventional transistors disqualifying at that scale — heat.

The company raised €2.6 million (approximately $3.0 million USD) in pre-seed funding led by Lifeline Ventures, with an angel investor participating. The capital will fund prototype development across several cryogenic signal control applications, the buildout of S-Transistors' own cryogenic laboratory in Espoo, Finland, a manufacturing pilot line, and team expansion.

Why Cables Are Killing the Qubit Roadmap

Quantum computing's most commercially advanced architecture — the superconducting qubit architecture used by IBM, Google, Rigetti, and Finland's own IQM — requires cooling to approximately 15 millikelvin (mK). That is colder than the 2.7K (−454.76°F) background temperature of deep space, achieved inside dilution refrigerators through a cascade of cooling stages that reduces thermal energy to near-absolute-zero.

The qubits that operate at millikelvin are extraordinarily sensitive. Any heat entering the system — including from a microwave pulse used to manipulate a qubit — must be carefully managed. Control pulses are generated by room-temperature electronics and transmitted down dedicated coaxial cables that run through the refrigerator's thermal stages. Every cable conducts not just signals but heat. The wiring bottleneck this creates is one of the most fundamental constraints on scaling superconducting quantum systems.

IBM's 1,121-qubit Condor processor, announced in 2023, already represents a cable management challenge of considerable complexity. The cables required to control it nearly fill the interior space of its dilution refrigerator. For the architecture to scale further — toward the 100,000-plus qubits required for fault-tolerant algorithms capable of breaking encryption or simulating molecular chemistry — the field broadly agrees that the control electronics must move into the cryostat itself, operating right next to the quantum chip.

"The clearest path forward, for superconducting quantum computers in particular, is to bring the classical control and interface hardware down into the cryostat, right next to the quantum chip kept cold to protect its fragile quantum states," said Dr. Heorhii Bohuslavskyi, co-founder and CEO of S-Transistors. "The catch is that such integration is extremely demanding in power dissipation, speed, and energy efficiency."

Inside the Fridge: Why Silicon Isn't Enough

Researchers attempting to move control electronics inside the cryostat have two main options available today. The first is cryogenic CMOS — conventional silicon transistors adapted to operate at 4K (−452.47°F) instead of room temperature. Silicon transistors can survive the cold, and the fabrication processes are familiar. In March 2026, IBM demonstrated cryo-CMOS flux control ASICs integrated with the flux-tunable couplers on its 156-qubit Heron R2 quantum processing unit at the APS Global Physics Summit — a significant milestone that showed comparable two-qubit gate error rates (~2.3×10⁻³) to room-temperature control electronics on the same hardware.

The second option, rapid single flux quantum (RSFQ) logic, uses superconducting Josephson junctions to encode data in single magnetic flux quanta and can run at clock speeds exceeding 700 GHz. But RSFQ has a critical limitation: its voltage pulses produce broadband electromagnetic excitations that cannot directly drive qubit transitions with the resonant precision quantum control requires. RSFQ drives qubits with pulse trains instead of resonant signals — a workable but awkward architectural fit.

S-Transistors is proposing a third path. Its devices combine the three-terminal, logic-compatible architecture of a conventional transistor with the physical property that makes superconductors unique: zero electrical resistance below a critical temperature. In a silicon transistor, current flowing through the device always encounters some resistance, producing I²R heating even in the on-state. In a superconductor, current flows through a condensate of paired electrons — Cooper pairs — with zero resistance, dissipating no Ohmic heat whatsoever.

"When you think about it, the transistor is the most mass-manufactured device in human history," said Dr. Andrey Generalov, co-founder and CTO of S-Transistors. "By combining the transistor functionality, with its unparalleled computing potential, and the superconducting property of near-zero power dissipation in a single device, we can reach a completely new level of energy-efficient cryogenic computing."

The distinction matters enormously at millikelvin temperatures, where the total cooling power available at the coldest stage of a dilution refrigerator is measured in microwatts. IBM's cryo-CMOS chips operate at the warmer 4K stage, not at millikelvin — a design choice that eases the heat budget but also means the interface electronics sit several thermal stages away from the qubits themselves. Superconducting transistors, operating at millikelvin with near-zero power dissipation, could sit directly alongside the qubit array.

The concept of a superconducting transistor is not new — the device category was first theorized in the 1980s — but fabricating such devices reproducibly at manufacturing-relevant scales has historically been out of reach.

From Lab to 150mm Wafer

What S-Transistors claims to have accomplished is the step from laboratory curiosity to manufacturable product. The company's S-Transistors technology page shows a 150mm (approximately 6 inches, or 15.24 cm) wafer carrying thousands of prototype superconducting transistor devices, alongside an example system-on-a-chip integration and a measurement trace demonstrating zero-resistance switching — the signature of superconducting operation.

The company describes its fabrication process as "CMOS-foundry-compatible and suitable for large-volume manufacturing" — language that, if accurate, is significant. Standard superconducting qubit fabrication uses electron-beam lithography, which is slow, expensive, and hard to scale beyond a handful of chips per run. CMOS-foundry-compatible processes use standard optical photolithography on silicon wafers, the same manufacturing pathway that produced billions of classical chips at commodity prices. That manufacturing compatibility is the long game in S-Transistors' technology pitch.

The pre-seed funding will support prototype development across several cryogenic signal control applications, the establishment of a dedicated cryogenic laboratory, and a manufacturing pilot line. The company says it will ship its first commercial product — a superconducting-transistor-based multiplexer — to early customers and strategic partners within its first year of operation.

The multiplexer is architecturally significant because it directly addresses the cable-count problem. Rather than one cable per qubit, a multiplexer inside the cryostat can route signals to multiple qubits through a shared connection, reducing the physical infrastructure required per qubit. This is the first logical step toward what S-Transistors calls the "quantum motherboard" — a fully integrated millikelvin-temperature orchestration platform for a qubit-based QPU that replaces the room-temperature cable infrastructure entirely.

Applications the company identifies beyond quantum computing include high-performance computing, artificial intelligence hardware, spacecraft electronics, and fundamental particle detectors. Superconducting electronics have long been used in astrophysics instrumentation for exactly this reason — near-zero power dissipation in a cryogenic detector is as valuable there as it is in a quantum processor.

A VTT Spinout With Deep Roots

S-Transistors emerges from an institution with unusually deep cryogenic fabrication credentials. VTT Technical Research Centre of Finland — a state-owned applied research organization founded in 1942 and Finland's largest research and technology company — has operated quantum fabrication infrastructure for decades. VTT ran an RSFQ qubit foundry as part of the European RSFQubit project, developed a niobium trilayer fabrication process for integrating superconducting qubits with RSFQ circuits, and co-developed the Unimon qubit in Nature (published in Nature Communications in 2022) alongside IQM Quantum Computers and Aalto University.

That fabrication pedigree provides S-Transistors with more than institutional prestige. The team's 50-plus combined years of experience across microelectronics, cryogenics, quantum electronics, and advanced manufacturing reflects direct continuity with VTT's materials and process research — which matters because superconducting transistor fabrication requires precise control of superconductor deposition, interface quality, and critical current density across an entire wafer. VTT has been doing this, in various forms, for years.

Finland's quantum ecosystem has seen substantial institutional investment. VTT currently operates quantum computers from IQM, with a 150-qubit IQM Radiance system scheduled for 2026 delivery and a 300-qubit system to follow in 2027. Finland's government allocated €70 million for VTT's 300-qubit project and €79 million for the Kvanttinova fabrication facility at Otaniemi — the same campus where S-Transistors will build its cryogenic laboratory.

"Our strategy at VTT is to shorten the journey from idea to pilot, from pilot to commercial solution," said Erja Turunen, Executive Vice President, in VTT's official press release. "We will continue to be a part of S-Transistors' journey as the company approaches the manufacturing phase. S-Transistors' superconducting transistor technology will allow us to reach the point where quantum computers finally provide real-world value."

Lifeline Ventures, a Finnish early-stage firm that previously backed consumer technology companies including Supercell and Wolt, led the pre-seed round. The investment represents a significant deepening of the firm's portfolio into hardware infrastructure. "S-Transistors is one of those rare companies built around a genuinely new piece of fundamental technology that could become an enabling layer for an entire industry," said Jyri Engeström, Partner at Lifeline Ventures. "As quantum computers scale from hundreds or thousands of qubits toward commercially useful machines, we believe superconducting transistors can become a critical part of the hardware stack that makes that scaling possible."

What Must Still Be Proven

S-Transistors' wafer-scale claim carries an important qualifier: these are prototype devices. The company has demonstrated thousands of superconducting transistors on a 150mm wafer and shown zero-resistance switching behavior, but independently verified performance metrics at production yields — error rates, operating frequency, gate fidelity when integrated alongside actual qubits — have not been published as of this writing.

The history of cryogenic control electronics for quantum computers is littered with approaches that performed well in isolation and encountered complications at integration. VTT's own earlier work on RSFQ-qubit integration found that the Nb-AlOx-Nb trilayer junction process — the standard for high-quality RSFQ circuits — had never produced high-quality superconducting qubits, a fundamental materials compatibility challenge that required re-engineering the process.

S-Transistors' CMOS-foundry-compatible claim implies it has found a different process path — one that sidesteps the trilayer problem while achieving both transistor-like switching behavior and superconducting zero-resistance. That is a genuinely challenging materials engineering task, and the community will want to see independent characterization data before treating the wafer-scale demonstration as a production-ready result.

The competitive race is also accelerating. IBM's March 2026 cryo-CMOS demonstration showed that silicon-based approaches can already achieve gate fidelities comparable to room-temperature control on real QPUs — not in simulation, but on 156 physical qubits of Heron R2 hardware. The window for superconducting transistors to establish a performance advantage over cryo-CMOS is real, but not unlimited. Solving the millikelvin heat budget problem is S-Transistors' strongest differentiator; demonstrating it at the integration level, with published gate fidelities on actual qubits, is the critical next milestone.

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Frequently Asked Questions

What is the "quantum cable crisis" and why does it matter?

Each qubit in a superconducting quantum computer currently requires its own dedicated cable running from the qubit — operating at approximately 15 millikelvin (−459.64°F) inside the dilution refrigerator — to room-temperature control electronics. At hundreds of qubits, these cables already fill the refrigerator's interior and create a thermal management challenge, since every cable conducts heat from the warm outside world toward the cold quantum processor. Scaling to the hundreds of thousands of qubits required for fault-tolerant computation using the same cable-per-qubit architecture is physically impractical. The only viable path, which the field broadly agrees on, is to move the control electronics inside the cryostat — which requires electronics that can operate at millikelvin temperatures without producing significant heat.

How are superconducting transistors different from the cryo-CMOS electronics IBM demonstrated in March 2026?

IBM's cryo-CMOS approach uses conventional silicon transistors cooled to around 4K (−452.47°F) inside the refrigerator. Silicon transistors do not become superconducting at any temperature — they still dissipate heat through resistive losses, even when cold. IBM has shown this works well enough on a 156-qubit QPU, with gate error rates comparable to room-temperature electronics. S-Transistors' devices are superconducting, meaning they conduct current with zero resistance and produce no Ohmic heat. The power advantage of superconducting transistors is most valuable at the coldest millikelvin stage, where the total available cooling power is in the microwatt range — a budget cryo-CMOS cannot easily meet. Whether S-Transistors can demonstrate this advantage at the integration level with real qubits is the key open question.

What is a quantum motherboard and is it the same thing as the multiplexer S-Transistors is shipping?

No — the multiplexer is the first commercial product and an immediate near-term deliverable. It is a signal-routing device designed to slot into existing cryogenic quantum laboratory setups and reduce the wiring burden per qubit. The quantum motherboard is the long-term product vision: a fully integrated millikelvin-temperature orchestration platform that replaces room-temperature cable infrastructure entirely, controlling the operation of an entire qubit array from inside the refrigerator. The multiplexer is the first step toward that platform, demonstrating the technology in a form factor existing quantum labs can use today.

What happens to quantum computing timelines if S-Transistors succeeds?

If superconducting transistors prove manufacturable at scale and integrate successfully with qubit arrays, they remove one of the most cited structural constraints on fault-tolerant quantum computing. The wiring bottleneck is not the only challenge — qubit coherence, error correction overhead, and readout fidelity all require continued progress — but it is the one that most directly limits how many qubits can fit inside a single refrigerator. Resolving it would unlock the next generation of large-scale QPU architectures that cannot be built with current cable-based infrastructure.