
tower semiconductor towersemi.com
Tower Semiconductor (NASDAQ/TASE: TSEM) announced Monday a dual-track, $3 billion expansion of its silicon photonics and silicon germanium manufacturing capacity in Japan, backed by roughly $1 billion in grants from Japan's Ministry of Economy, Trade and Industry (METI). The investment is the largest single capital commitment the Israeli foundry has made in its three-decade history — and it is grounded in a physical reality, not just a market forecast: at terabit-per-second data rates, copper interconnects run out of physics, and the chip industry has no alternative to light.
The announcement updated Tower's 2028 business model to $3.6 billion in revenue and $1.2 billion in net profit, up from the prior targets of $2.8 billion and $750 million. Shares jumped more than 17% in premarket trading Tuesday morning.
The demand Tower is betting on is structural, not cyclical. Copper wiring carries data by moving electrons, and electrons moving at high frequencies suffer from the skin effect: at terabit speeds, current is forced to the surface of the conductor, dramatically increasing resistance, heat, and signal loss. Industry sources and engineering literature consistently confirm that copper cables lose signal integrity and become physically too thick and short for AI cluster architectures at data rates of 1.6 terabits per second and above.
This is not a problem that better copper or smarter equalization can solve — it is a materials limit. Once an AI training cluster spans more racks than a short copper cable can reliably serve, light becomes the only viable medium. The result is that silicon photonics capacity is not a commodity asset whose demand will soften when the AI investment cycle cools. It is the physical substrate on which the next generation of AI scaling depends — what Moore's Law was to transistors, optical interconnects are now becoming to data movement.
Tower's expansion, announced July 14, 2026, is structured specifically around this thesis. CEO Russell Ellwanger described the buildout as a response to "the rapidly growing long-term customer demand" for "next-generation optical connectivity requirements" — language that reflects the contracts Tower has already signed, not future projections. By May 2026, the company had inked $1.3 billion in silicon photonics revenue contracts for 2027 alone, collected $290 million in customer prepayments, and received commitments for "substantially higher" 2028 capacity from the same customers.
Silicon photonics moves data as light pulses rather than electrical signals, but manufacturing it at scale requires solving problems that differ substantially from conventional chip fabrication.
The starting point is silicon-on-insulator (SOI): a thin silicon layer — the waveguide — deposited on a silica foundation. Silicon has a refractive index of approximately 3.5, versus silica's 1.44, which forces light propagating along the waveguide boundary to undergo total internal reflection. The result is that light stays confined inside silicon channels only a few hundred nanometers across. At the 1.55-micrometer wavelength used by virtually all commercial fiber optic systems, silicon is transparent — light travels through it without being absorbed, unlike at visible wavelengths.
Encoding data onto that light requires modulation: altering the intensity or phase of the optical carrier in sync with a digital signal. The dominant commercial approach is the Mach-Zehnder Modulator (MZM), which splits the light into two paths, applies a phase shift to one by changing the free-carrier density in the silicon (the plasma dispersion effect described by Soref and Bennett), then recombines the beams. Interference between the two paths produces amplitude modulation. Tower's production platform uses this architecture, which is CMOS-compatible and manufacturable on standard semiconductor equipment.
There is a ceiling. Pure silicon carrier-depletion MZMs have an electro-optic bandwidth limited to roughly 50 gigahertz — a consequence of photon lifetime and the RC time constant of the junction. For 100G-per-lane transmission, that ceiling is acceptable; 200G and 400G lanes require electro-optic bandwidths of 100 GHz and above, which silicon depletion modulators cannot reach on their own. Tower and Coherent demonstrated 400 Gbps per lane at the Optical Fiber Communication Conference (OFC) in March 2026, using a silicon MZM paired with an indium phosphide (InP) continuous-wave laser — the silicon handled modulation, while the InP laser provided the light source, since silicon's indirect bandgap prevents it from emitting photons efficiently.
Tower's roadmap acknowledges this ceiling directly. The company is developing next-generation modulator platforms — thin-film lithium niobate (TFLN), InP-integrated modulators, organic electro-optic polymers, silicon electro-absorption modulators, and microring modulators — each targeting the 200 GBaud and beyond operating range the 3.2-terabit transceiver generation will require. The silicon platform is not at the end of its trajectory; it is the manufacturing foundation onto which higher-performance modulator materials are increasingly being integrated.
On the detector side, silicon photonics platforms use germanium photodiodes — germanium absorbs the 1.55-micrometer telecom wavelength efficiently where silicon cannot, which is why Tower's processes include SiGe (silicon germanium). Silicon-germanium avalanche photodiodes have demonstrated gain-bandwidth products exceeding 300 GHz, making them viable for high-speed reception. This coupling of silicon waveguides with germanium detectors and InP lasers is why Tower's platform bundles SiPho and SiGe together as a coherent technology suite rather than separate products.
The economics of 300mm wafers matter here. Moving from 200mm to 300mm wafers increases the area per wafer by roughly 2.25 times, spreading fixed lithography and process costs across significantly more dies per wafer. Tower's Japan Fab 7 in Uozu was its first 300mm SiPho facility, launched in 2024. The entire $3 billion expansion is built around 300mm, including the conversion of the Arai facility (formerly Fab 6) and the planned new fab adjacent to Fab 7 — cementing a cost and throughput advantage over legacy 200mm SiPho competitors.
For data center architects, there is also a structural transition underway in how optical components are deployed. Today, optical transceivers are pluggable modules — separate components that slot into switches and routers. The next wave is co-packaged optics (CPO), which integrates photonics directly onto the switch ASIC package. CPO reduces the electrical path between the silicon logic die and the optical engine to near zero, dramatically cutting the power that copper interconnects between the transceiver and the chip would otherwise consume. Tower's platform is designed to support both pluggable transceivers and CPO — positioning it for the architectural transition, not just the current generation.
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The expansion unfolds along two parallel lines, each with a different time horizon and risk profile.
Track 1 converts the Arai facility in Niigata Prefecture — previously Fab 6, originally used for semiconductor assembly — into a 300mm SiPho and advanced packaging operation. Tower is targeting full production readiness at Arai by the fourth quarter of 2027, while simultaneously pushing throughput at the existing Fab 7 in Uozu, Toyama, to its maximum. The company's updated 2028 financial targets are based on Track 1 alone.
Track 2 is the larger and less certain commitment: constructing an entirely new 300mm manufacturing facility adjacent to Fab 7, contingent on the signing and closing of agreements Tower has not yet disclosed. This facility is expected to deliver a "multi-fold increase" in SiPho and SiGe capacity and should begin generating meaningful revenue from 2029 onward. Tower describes it as "highly accretive" once it ramps, framing it as the growth vehicle for far beyond the 2028 model.
The strategic logic behind the two-track structure is risk management. Track 1 expands around Fab 7's existing, revenue-generating, process-qualified operation — meaning the first incremental wafers off the expanded line do not require new customer qualification cycles, which typically take one to two years. Track 2 adds new building and new tools in parallel, but builds on a qualified process base rather than starting from zero. Ellwanger explicitly contrasted this with "greenfield qualification or a fab-to-fab product transfer" that would require "multi cycles of learning."
The total project cost is approximately $3 billion net of the $1 billion in METI grants. Tower's forward-looking disclosures note the standard risks of a program this size: equipment lead times, permitting, the conditions attached to the METI grant (breach of grant covenants could result in loss of some or all of the funding), and the need to finalize definitive agreements for Track 2. The company has also flagged additional income tax exposure from the OECD Pillar Two minimum corporate tax rate of 15%, which took effect in 2026 and primarily affects Tower's Israeli operations, where it previously benefited from a 7.5% preferred rate.
The 2028 target is not speculative. The revenue model is underpinned by a layer of contracted demand that is visible and specific.
In May 2026, Tower announced it had signed silicon photonics contracts with its largest customers committing to $1.3 billion in 2027 revenue, and had already received $290 million of that in customer prepayments for capacity reservations. The 2028 contracts signed by that same point indicated "substantially higher" capacity reservations, with corresponding prepayments due by January 2027. Tower's total SiPho customer base stood at more than 50 active customers across data center, LiDAR, quantum computing, and automotive sensing applications.
The Marvell Technology partnership illustrates how far down the production maturity curve Tower has traveled. By June 2026, Tower and Marvell had jointly shipped more than five million coherent photonic integrated circuits — a volume milestone in a market segment that was considered research-grade hardware only five years ago. Coherent Corp.'s joint demonstration of 400 Gbps per lane at OFC in March 2026 added a technical data point: Tower's platform is already operating at the performance tier that next-generation 3.2-terabit transceivers require.
The 2028 model — $3.6 billion in revenue, $1.2 billion in net profit — represents a near-doubling of recent financial scale and a significant step up from the prior targets Tower was guiding to as recently as the Q1 2026 earnings call on May 13, 2026. Analysts estimated consensus 2028 revenue of approximately $3.17 billion before this announcement, meaning today's guidance implies a 14% premium to sell-side estimates.
Investors should note that Track 2's greenfield fab is explicitly excluded from the 2028 model. If Track 2 clears its permitting, agreements, and construction timeline, the 2029-and-beyond revenue opportunity sits on top of the $3.6 billion baseline.
Read more: POET Technologies and Lumilens Secure $50M Deal to Replace Copper Wires With Light Inside AI Data Centers
The $1 billion METI grant is large by any individual-company standard, but it sits within a policy framework Japan has been executing with increasing urgency since the global semiconductor supply disruptions of 2021. Japan's Ministry of Economy, Trade and Industry secured approximately ¥1.23 trillion (roughly $8.2 billion) in its fiscal year 2026 budget for semiconductor and AI programs — nearly four times the prior year's level.
Tower's photonics expansion fills a specific niche in Japan's three-pillar strategy. The Taiwan Semiconductor Manufacturing Company's joint venture with Sony in Kumamoto addresses mature-node logic capacity. The government-backed Rapidus program in Hokkaido is attempting to manufacture 2-nanometer leading-edge logic chips. Neither of those programs produces silicon photonics or silicon germanium at scale — and both are overwhelmingly focused on the logic side of the semiconductor market.
Tower's Fab 7 in Uozu was already the foundation of what Japan can plausibly claim as a domestic silicon photonics center of excellence: a qualified 300mm SiPho process, production tools in place, and a workforce with decades of accumulated analog process knowledge inherited from the former Panasonic Semiconductor operations Tower acquired in 2014. The METI grant is, in effect, payment for locking that center of excellence into Japanese soil and expanding it rather than building equivalent capacity elsewhere.
Japan has historically been strong in semiconductor materials and equipment rather than finished chip manufacturing. Rebuilding a manufacturing base in specialized, high-value-add analog processes — rather than competing head-to-head with Taiwan and South Korea on leading-edge logic — is a rational industrial policy bet. Tower's photonics platform is a category that Japan can conceivably lead at the systems level without needing to out-invest TSMC.
The March 2026 restructuring of Tower's Japanese joint venture with Nuvoton Technology Corporation Japan was a prerequisite for a commitment of this scale. Under that deal, Tower is taking full ownership of the 300mm Fab 7, which will be organized under a wholly owned Japanese subsidiary, while its joint venture partner NTCJ is taking full ownership of the 200mm Fab 5 in Tonami. NTCJ pays Tower $25 million for the 200mm fab transfer. That restructuring is expected to close around April 1, 2027, subject to regulatory approvals, and both companies have agreed to provide production services for each other's existing customers during the transition. The governance clarity that full ownership provides is what made a $3 billion commitment viable to board and shareholders in the first place.
Tower is not the only foundry pursuing 300mm silicon photonics. But the competitive gap it now holds is large enough to matter.
GlobalFoundries acquired the Advanced Micro Foundry (AMF) in Singapore to obtain a SiPho capability, and as of late 2025 was planning to upgrade that 200mm capability to 300mm. STMicroelectronics re-entered silicon photonics in early 2025 after having exited it, and shares a 300mm fab in Agrate, Italy with Tower. UMC launched a 300mm SiPho program. Silterra operates a 200mm platform in Malaysia with limited expansion headroom. Intel maintains SiPho capabilities despite its ongoing restructuring.
Industry analysis estimated in November 2025 that Tower was positioned to challenge GlobalFoundries for the leading SiPho foundry position in 2026, with silicon photonics revenue roughly doubling from $106 million in 2024 to $228 million in 2025 and annualizing above $360 million by the end of that year. Independent analysis from early 2026 concluded that Tower's competitors at UMC, GlobalFoundries, and STMicroelectronics "still trail Tower by a wide margin" on the SiPho photonic integrated circuit front. The $3 billion Japan announcement, backed by $1.3 billion in signed contracts, materially widens the time and capital gap between Tower and any foundry attempting to replicate its position.
Tower also faces a meaningful litigation risk: GlobalFoundries has three active patent infringement claims against the company involving specialty process technologies, the outcomes of which remain pending. Those claims represent a real overhang, though Tower's risk disclosures treat them as an ongoing legal matter rather than an existential threat to operations.
The broader context for Tower's timing is the photonics investment wave now visible across the industry. Hyperscalers and infrastructure companies have been committing to optical components at a scale that treats silicon photonics capacity as a strategic input rather than a commodity procurement line item. That wave makes Tower's multi-year, multi-billion capital commitment a bet on a supply constraint that is already being funded from the demand side. The question for investors is not whether silicon photonics demand will grow — it is whether Tower can execute the construction, equipment installation, and qualification timeline on the schedule it has set.
Silicon photonics is a manufacturing technology that produces optical components — devices that encode, transmit, and decode data as pulses of light — using the same silicon-on-insulator wafer processes that conventional semiconductor fabrication uses. AI data centers need it because copper wiring, the default interconnect between chips and servers, reaches a physical ceiling at data rates above 1.6 terabits per second: the skin effect causes electrons to crowd onto the conductor's surface at high frequencies, dramatically increasing resistance, heat, and signal loss. Optical interconnects do not share this constraint — light travels through silicon waveguides without the same bandwidth-distance tradeoff — making silicon photonics not optional but physically necessary as AI clusters scale beyond what copper can sustain.
It is grounded in signed contracts rather than projections alone. By May 2026, Tower had committed silicon photonics customers to $1.3 billion in 2027 revenue and collected $290 million in prepayments, with 2028 commitments described as "substantially higher." The target represents Track 1 of today's expansion only — the conversion of the Arai facility and the maximization of Fab 7 output, both in Japan. Track 2, the new 300mm fab adjacent to Fab 7, is not included in the 2028 model and is expected to begin contributing revenue from 2029 onward.
A silicon photonic chip guides light rather than electrons, using waveguides on the order of a few hundred nanometers wide that confine light through total internal reflection. The challenge is that silicon cannot easily generate light — its indirect bandgap prevents efficient photon emission — so current platforms pair silicon modulators and germanium detectors with external indium phosphide (InP) lasers. The other limitation is modulation bandwidth: silicon carrier-depletion Mach-Zehnder Modulators are constrained to roughly 50 GHz electro-optic bandwidth, which is insufficient for the 400G-per-lane and beyond performance the 3.2-terabit transceiver generation requires. Tower and its partners are addressing this by integrating alternative modulator materials — thin-film lithium niobate (TFLN), organic electro-optic polymers, and InP — onto the silicon platform, trading some CMOS-process simplicity for the bandwidth performance pure silicon cannot deliver.
Japan has committed roughly ¥1.23 trillion ($8.2 billion) in fiscal year 2026 for semiconductors and AI, with the largest single allocation going to Rapidus, the state-backed effort to manufacture 2-nanometer logic chips in Hokkaido. The $1 billion METI grant to Tower addresses a different market entirely: specialized analog processes, specifically silicon photonics and silicon germanium, where Japan has existing industrial infrastructure from the former Panasonic Semiconductor operations Tower acquired in 2014. Tower fills the specialty optical capacity niche that neither the TSMC-Sony Kumamoto joint venture nor Rapidus covers, making it a complementary rather than competing investment for Japan's semiconductor strategy.
