From September 7 to 10, 2026, the IEEE European Solid-State Electronics Research Conference (ESSERC 2026) took place in Palma, Mallorca, Spain. Two pioneering research achievements from the teams led by Professor Cheng Lin and Professor Hu Yizhe at the School of Microelectronics, University of Science and Technology of China (USTC), were selected for presentation at the conference, where they were delivered as oral reports.
Professor Cheng Lin’s research team introduced a transient energy buffering technology designed to address the power supply challenges faced by computing chips. By refining the energy distribution pathway, this technology achieved a remarkable 3.4-fold reduction in voltage overshoot under a 5A/20ns load transient condition. Furthermore, it successfully reduced the volume of passive components by more than 30%. The findings from this research were published in a paper titled “A 5-12V to 1-1.8V DC-DC Converter with Transient Energy Buffer Achieving 3.4× Overshoot Reduction Under 5A/20ns Load Transients.”
Meanwhile, Professor Hu Yizhe’s research team developed a vector-modulated phase shifter with a replicated branch, specifically tailored for C-band phased array applications. Through the coordinated operation of the main branch and the replicated branch, the design achieved outstanding performance metrics, including a root mean square (RMS) phase error ranging from 1.18° to 2.04° and an amplitude error between 0.10dB and 0.22dB across 128 phase states within the 2.8-5.6GHz frequency band. The related research findings were published under the title “A Calibration-Free Impedance-Invariant Phase and Amplitude Control Unit Achieving < 2° RMS Phase Error for C-Band Phased Arrays.”
Both studies received financial support from key projects, including the National Natural Science Foundation of China and the Natural Science Foundation of Anhui Province.
