Evas.ai

Beijing-based AI chip startup EVAS Intelligence closed a financing round of nearly RMB 2 billion (approximately $295 million USD — exchange rate as of September 19, 2026; conversions are approximate) on September 18, making it one of the largest private semiconductor raises in China this year and marking the most capitalized test yet of a quietly consequential bet: that RISC-V, whose open-standard governance body relocated to Switzerland in 2019 specifically to avoid exposure to US trade regulations, can become the architectural backbone of production cloud-scale AI infrastructure that Washington cannot restrict.

The post-money valuation came to nearly RMB 15 billion (approximately $2.21 billion USD), confirming EVAS as a fully fledged unicorn. More than 20 institutional investors participated, including lead backers Huatai Innovation, Eastern Bell Capital, and Zhongxin Juyuan — a fund linked to SMIC, China's leading domestic chipmaker, itself on the US entity list.

What EVAS Actually Built

EVAS is not a chip design house that licenses someone else's architecture. Its core product, the Epoch series, is built from the ground up on the RISC-V ISA and the RISC-V Vector extension (RVV) — the open standard that covers matrix and tensor operations critical for AI workloads. On top of that ISA foundation sits EVAMIND, the company's internally developed fifth-generation RISC-V DSA.

The design philosophy departs substantially from Nvidia's GPU model. Where an Nvidia GPU uses thousands of general-purpose shader cores running CUDA code in a single-instruction-multiple-thread pattern, EVAMIND follows a TPU-style approach: a matrix and tensor-focused accelerator managed by embedded RISC-V cores that handle data flow, runtime scheduling, and memory management. The RISC-V cores are not the compute engines — they are the choreographers that direct data into and out of purpose-built matrix-multiplication engines. This structure, the company says, allows instruction and data parallelism at the core level, though independent third-party benchmarks confirming EVAS's claim of performance parity with leading vendors have not been published.

The Epoch chip natively supports block-quantized FP8 precision, a format that has become the workhorse of modern large-model training because it roughly halves memory bandwidth requirements compared to FP16 while maintaining acceptable model accuracy through a per-block scaling mechanism. EVAS says Epoch is China's first RISC-V cloud chip to reach this milestone. The next generation extends that to EXFP4 and MXFP4, four-bit microscaling formats that compress even further — a roadmap already taped out.

Why RISC-V Makes This Different from Huawei or Any Other China Chip Play

The single most consequential fact in the EVAS story is architectural, not financial. RISC-V International — the Swiss nonprofit governing RISC-V — relocated from the United States to Switzerland in 2019. The organization was explicit about the reason: it cited concerns over US trade regulations. That relocation is structural, not cosmetic. An instruction set architecture owned by a Swiss nonprofit with more than 4,500 global members, including Google, Nvidia, Intel, and Red Hat, cannot be subjected to US Commerce Department export controls the way a US company's proprietary chip can.

This is the architecture-level exposure gap that Huawei and EVAS represent very differently. Huawei's Ascend chips use a proprietary architecture and face ongoing scrutiny about potential US leverage points. EVAS's Epoch chips run on an ISA that is, in a meaningful structural sense, outside the reach of the enforcement mechanism the US has deployed most aggressively against Chinese AI: blocking Nvidia GPU exports.

US lawmakers recognized exactly this dynamic in November 2023, urging the Commerce Department to require export licenses for RISC-V work with China. That restriction has not been enacted, and many observers — including RISC-V International itself — argue that trying to control an open ISA with 4,500 member organizations would damage the global research ecosystem far more than it would contain China. For now, the architecture stands outside the control perimeter.

From Chip to Cluster: What EVAS Unveiled at WAIC 2026

EVAS is not positioning Epoch as a standalone chip. At the 2026 World Artificial Intelligence Conference in Shanghai in July, the company debuted what it called the industry's first RISC-V AI SuperNode: a full-rack system integrating Epoch chips, its proprietary ELink high-speed interconnect, an orthogonal backplane-free design, and full-rack liquid cooling.

The ELink interconnect delivers 3.2 terabits per second of single-chip interconnect bandwidth — a design choice that addresses a documented constraint in copper-based supernode scaling, where signal integrity degrades beyond approximately 128 accelerators at current 224 Gbps speeds. By eliminating the traditional backplane and using an orthogonal interconnect architecture, EVAS says a single rack can support 64 to 128 Epoch chips in a fully symmetric Scale-Up configuration, scaling to clusters of more than 100,000 cards.

The software story matters as much as the silicon. The EVACA software stack and KernelFab operator engine use AI agents to compress the process of writing custom AI operators from weeks to days. EVAS's VISA virtual instruction set promises "program once, deploy across multiple chips" — the company's answer to the CUDA lock-in that makes migrating away from Nvidia so costly for existing customers.

As of July 2026, EVAS had signed strategic cooperation agreements with Zhongneng Intelligent Computing and Guofu Data to build what it describes as the world's first full-stack RISC-V SuperNode AI Token Factory — an infrastructure project covering RISC-V AI computing chips, self-developed CPUs, high-speed network switching, and SuperNodes, all domestically sourced.

Benchmarks and What EVAS Has Not Shown

Performance claims are company statements only. EVAS says EVAMIND "demonstrates performance on par with leading vendors' latest AI processors," but Epoch has not been submitted to MLPerf, MLCommons, or any other third-party benchmark standard. Independent verification does not exist in English-language technical sources as of September 19, 2026.

For context: Huawei's Ascend 910C inference performance, China's most established domestic AI accelerator, delivers roughly 60% of Nvidia H100 inference performance according to DeepSeek researchers, and Huawei's overall compute output remains less than 4% of Nvidia's. EVAS's chip is newer and less proven in production than Ascend; its performance claims should be treated with corresponding caution.

The software ecosystem gap is real. RISC-V's open architecture means every vendor builds its own software stack rather than inheriting Nvidia's $50 billion CUDA ecosystem. As an April 2026 analysis by Alpinum Consulting noted, the RISC-V software ecosystem "evolves at different rates across different layers" and integration effort "moves into the system boundary, where assumptions meet reality." EVACA and KernelFab address this directly, but their maturity for demanding production workloads outside China remains unproven.

Manufacturing node: unlike Nvidia (TSMC N4/N3) or even Alibaba's XuanTie C950 (TSMC 5nm), EVAS has not disclosed which foundry fabricates Epoch or at what process node. Given SMIC's involvement as an investor and SMIC's restrictions from advanced EUV lithography, this is a material unknown — manufacturing capability constrains the performance ceiling that any AI chip architecture can reach regardless of ISA choice.

What China's National Intelligence Law Means for Buyers

Any organization evaluating EVAS's chips or the compute infrastructure built on them should understand the legal framework governing EVAS as a Beijing-headquartered company.

China's National Intelligence Law (2017), Article 7, requires that all organizations and citizens "support, assist, and cooperate with national intelligence efforts in accordance with law." Article 14 authorizes intelligence agencies to demand assistance from organizations operating in China. The obligation is a fixed legal condition of operating under Chinese law — it is not a risk that can be mitigated by EVAS's stated privacy policy, by any commercial agreement, or by routing data through servers outside China. The US Department of Homeland Security's Data Security Business Advisory explicitly notes that Chinese companies face these obligations.

China's Data Security Law and Cybersecurity Law add government-access and data-localization provisions that reinforce the baseline requirement. For enterprise customers in the United States, Europe, or other jurisdictions with data sovereignty rules, these legal obligations are not theoretical — they are structural conditions of any procurement decision involving EVAS compute infrastructure. Legal scholars disagree about the scope and enforcement mechanism of Article 7 specifically, but no serious analysis disputes that the obligation exists.

Fundraising at the Speed of Strategic Urgency

The cadence of EVAS's capital formation is unusual even within China's heated AI semiconductor environment. The September 2026 round came after a RMB 1.5 billion Series B in June 2026, earmarked for mass production of the Epoch series, next-generation chip R&D, software-hardware ecosystem development, and global expansion. Shortly before that, China Mobile's Chain Leader Fund made a strategic investment of several hundred million yuan. That is three significant capital events in approximately twelve months.

New Market Pitch industry analysis found that late-stage AI chip rounds — Series C and beyond — captured nearly 79% of disclosed AI chip capital over the past two years, indicating a market past its formation phase and into expensive validation and scaling. EVAS's trajectory — from a Guangzhou-registered fabless startup founded in January 2022 to a RMB 15 billion (~$2.21 billion USD) unicorn with production chips and a full-rack system in under five years — is one of the most compressed startup-to-unicorn timelines in the Chinese semiconductor sector.

The presence of Zhongxin Juyuan (SMIC Capital) as a lead investor ties the round directly into China's domestic semiconductor supply chain. The same round attracted 20+ institutional investors spanning industrial funds, financial firms, state-adjacent capital, and commercial partners — a coalition structure that reflects deliberate, state-aligned capital deployment rather than pure commercial venture speculation.

Is This the Real AI Chip Export-Control Workaround?

The broader Chinese AI chip funding landscape on September 18 illustrates the scale of the underlying push: quantum computing firm Arclight Quantum simultaneously raised more than RMB 100 million (approximately $14.7 million USD) from a China Mobile-backed fund, photonic chip startup Xili Optoelectronics secured RMB 100 million-scale financing for high-speed AI data-center links, and embodied-AI data company Shutu Technology raised nearly RMB 100 million. EVAS's round was the largest single event in a day of clustered AI infrastructure bets.

The real question for the coming 12 to 24 months is not whether EVAS has raised enough capital — it has — but whether a RISC-V-based cloud AI accelerator with a nascent software ecosystem can win workloads from customers who currently default to Nvidia or, for domestic Chinese buyers, from Huawei Ascend. RISC-V's share of new silicon designs globally reached an estimated 25% by January 2026 — but virtually all of that was in IoT (55%), embedded systems, and edge AI. Scaling an open ISA into data-center AI training clusters, where ecosystem lock-in, compiler maturity, and operator library completeness determine real-world throughput, is a qualitatively harder problem.

EVAS's answers — EVACA, KernelFab, VISA virtual instruction set — are promising architecturally. None of them yet has a documented production track record at scale outside of Chinese domestic deployments. The architectural immunity to US export controls is real. Whether it translates into competitive performance at cluster scale, against incumbents with years of software ecosystem investment, is the open question that $295 million in new capital now finances.

Frequently Asked Questions

Can the US government restrict RISC-V chips from China?

Not directly, and this is the core insight behind EVAS's architecture choice. RISC-V is governed by RISC-V International, a Swiss nonprofit that relocated from the United States to Switzerland in 2019 specifically to reduce exposure to US trade regulation. The open instruction set can be used royalty-free by anyone, and the US cannot impose export controls on RISC-V the same way it restricts Nvidia's GPU exports. US lawmakers proposed in November 2023 to require export licenses for US persons engaging with China on RISC-V, but that restriction has not been enacted. The architecture remains structurally outside the primary US export enforcement mechanism.

How does Epoch differ from Nvidia's H100 or Huawei's Ascend chips?

Epoch uses RISC-V Vector extensions as its ISA and a TPU-style domain-specific architecture (EVAMIND) where embedded RISC-V cores direct data into purpose-built matrix engines, rather than Nvidia's general-purpose CUDA GPU model. This is similar in philosophy to Google's TPU. EVAS claims performance parity with leading AI processors, but no independent third-party benchmark confirms this. By contrast, Huawei's Ascend 910C has been independently measured at roughly 60% of H100 inference performance, and Huawei produces less than 4% of Nvidia's compute output. Epoch is newer and less externally validated than Ascend.

What are the data privacy risks of EVAS chips for international buyers?

China's National Intelligence Law (2017) requires all organizations headquartered in China to support, assist, and cooperate with government intelligence requests. This legal obligation applies to EVAS regardless of where its servers are located or what its privacy policy states. China's Data Security Law (2021) and Cybersecurity Law (2017) add data-localization and government-access provisions. Enterprise buyers in the United States and Europe with data sovereignty obligations should assess whether AI infrastructure built on EVAS chips satisfies applicable compliance requirements before procurement.

What is the status of EVAS's RISC-V software ecosystem compared to CUDA?

EVAS has built its own software stack — EVACA, KernelFab, and the VISA virtual instruction set — to address the fundamental limitation that RISC-V lacks a CUDA equivalent. KernelFab uses AI agents to compress custom operator development from weeks to days; VISA promises "program once, deploy across multiple chips." These are credible architectural responses to the CUDA lock-in problem. However, Nvidia's CUDA ecosystem represents decades of investment and millions of trained developers. EVAS's software tools are early-stage and have not been publicly evaluated outside Chinese domestic deployments. The software gap is the largest structural risk for international adoption.