
Cxmt.com
Thursday night, 9.4 million Chinese investor accounts submitted bids for shares in ChangXin Memory Technologies, producing a retail oversubscription ratio of 212 times as confirmed by the South China Morning Post. The Hefei-based chipmaker closed the subscription window on what is now the largest A-share semiconductor initial public offering in history — surpassing the ¥53.2 billion SMIC listing in 2020 — and the most vivid signal yet that Chinese capital markets are betting heavily on Beijing's push to build a homegrown DRAM industry. The lottery drawing to determine which of those 9.4 million accounts actually receives shares is scheduled for Monday. Trading on the Shanghai STAR Market is expected to begin July 27.
What investors crowded the subscription portal for is a specific and measurable commercial story: a company that lost ¥19.23 billion in 2023, turned its first annual profit in 2025, and reported Q1 2026 revenue of ¥50.8 billion — a 719% year-on-year surge — with attributable net profit of ¥24.76 billion. Before deciding what that story means, a reader needs to understand three things the oversubscription ratio does not tell them: where the profits actually come from, who actually receives them, and where the technology ceiling is.
CXMT priced its offering at ¥8.66 per share, selling approximately 6.69 billion shares — roughly 10% of its enlarged capital — to raise ¥57.9 billion ($8.55 billion) before any greenshoe option. If a 15% overallotment is fully exercised, gross proceeds could reach ¥66.6 billion, taking the total raise to approximately $9.8 billion — Asia's largest IPO of 2026 and the second-largest in China's capital market history, behind only Agricultural Bank of China's $10 billion offering in 2010. The IPO price implies a listing-day market capitalization of roughly ¥579 billion ($85.2 billion).
China's online IPO system does not require applicants to provide cash when submitting subscriptions. Instead, participants receive lottery entries based on their existing Shanghai-listed shareholdings and pay only if they win allocations. Valid applications totaled nearly 817 billion shares on Thursday, triggering a mandatory clawback mechanism that shifted approximately 502 million shares from the institutional tranche to retail investors. Even after that expansion, the final allotment rate settled at 0.47% — meaning fewer than one in 200 applicants received any shares.
Institutional appetite matched retail intensity. Valid preliminary bids from 285 institutional investors covered approximately 1.24 trillion shares — nearly 463 times the initial offline tranche. Among them: 153 private fund products managed by High-Flyer Quant, the hedge fund co-founded by DeepSeek founder Liang Wenfeng, submitted bids at ¥8.78 per share for a combined 12.55 billion shares.
The pace of the listing itself signals government intent. From STAR Market acceptance of CXMT's application on December 30, 2025 to formal approval took just 148 days — a record review pace for the board — following a brief pause in March 2026 over expired financial data. Analysts read the expedited timeline as Beijing prioritizing CXMT's capitalization as a matter of industrial policy.
One structural detail that the headline numbers obscure: at its IPO valuation, CXMT is priced at roughly 5.9 times projected 2026 earnings — well below the consensus multiple of approximately 20 times for comparable global memory companies. That gap is why Hyperliquid futures traders priced CXMT contracts as high as $8.64 — roughly 575% above the ¥8.66 ($1.28) official offer price — ahead of the listing debut, implying a market-implied valuation near $500 billion.
The investor stampede is partly a bet on one of the most dramatic earnings reversals in Chinese tech in recent memory. In 2023, CXMT posted a net loss of ¥19.23 billion. By 2025, the company swung to a full-year profit of ¥7.14 billion. In Q1 2026 alone, it reported revenue of ¥50.8 billion and net profit of ¥24.76 billion — a 1,688% increase year-on-year. It projects first-half 2026 net profit of between ¥50 billion and ¥57 billion, a figure analysts have translated colloquially to roughly ¥300 million in daily earnings.
A critical caveat belongs alongside those numbers: SemiAnalysis, which covers the semiconductor industry in detailed financial and technical depth, found that CXMT's consolidated net profit figure substantially overstates what public shareholders will actually receive. CXMT consolidates the earnings of two major fab subsidiaries — Changxin Xinqiao and Changxin Jidian Beijing — while holding only approximately 30.68% and 31.72% of their economics, respectively, through acting-in-concert voting arrangements that give it 73–75% of voting control. As a result, roughly 74% of FY2025 net profit was attributable to minority interests: only ¥1.87 billion of the ¥7.14 billion consolidated figure flowed to parent shareholders. Investors purchasing shares in CXMT are buying exposure to a business that generates far more profit in its consolidated presentation than its parent-level economics currently deliver.
The macro driver behind the profit reversal is what multiple institutions have described as a "once-in-fifteen-years" memory supercycle, with artificial intelligence infrastructure at its core. Samsung, SK Hynix, and Micron have raced to capture the outsized margins of high-bandwidth memory — a DRAM variant used in AI training chips that consumes two to three times the wafer area of standard DRAM — effectively starving conventional DRAM markets of supply. That structural squeeze sent standard DRAM contract prices sharply higher: one 8GB+256GB consumer storage combination saw prices rise nearly 200% in Q1 2026 compared to the prior year, and 32GB DDR5 kits for PC builders hit a $375 floor. CXMT, positioned squarely in conventional DDR5 and LPDDR5/5X production, found itself filling a gap the incumbents voluntarily vacated to pursue higher-margin AI memory.
The financial metrics confirm the tailwind. CXMT's average selling price rose 33.69% year-on-year in 2025, while unit costs fell more than 20% on improved yields and scale. Gross margin expanded from negative 1.93% in 2023 to 40.99% in 2025. Those margins, however, are a product of an extraordinary market dislocation — not a structural cost advantage over the incumbents. CXMT's cost-per-bit still trails Samsung, SK Hynix, and Micron by more than 30%.
Read more: DDR5 RAM Hits $375 Floor for PC Builders: HBM Takes Three Times More Wafers
According to Omdia data, CXMT held approximately 7.6% of global DRAM revenue market share in Q1 2026, placing it fourth worldwide. Samsung held roughly 38%, SK Hynix roughly 29%, and Micron roughly 23% — together controlling approximately 89% of the market. CXMT grew its share by absorbing volumes the incumbents chose to redirect toward premium AI memory.
CXMT is China's only integrated device manufacturer achieving mass-production-scale DRAM, handling the full stack of design, research and development, manufacturing, and sales. Its current product portfolio centers on DDR4, DDR5, LPDDR4X, and LPDDR5/5X — mainstream specifications that underpin PCs, smartphones, servers, and edge AI devices. More than 98% of its 2025 revenue came from LPDDR and DDR product families.
The core technical constraint on CXMT's future is lithography. CXMT built its production roadmap around deep-ultraviolet multi-patterning rather than extreme-ultraviolet lithography tools.
Here is why that distinction matters: ASML's extreme-ultraviolet machines use 13.5nm-wavelength light to print chip features in a single exposure pass. That single-pass capability is what allows Samsung and SK Hynix to reach the finest process nodes with competitive yields and costs. EUV equipment has been prohibited from export to China under US and Dutch controls, and ASML — the sole manufacturer — is bound by both regulatory frameworks.
CXMT instead uses deep-ultraviolet tools with 193nm-wavelength light and compensates by running circuits through two to four patterning passes — a technique called multi-patterning (specifically self-aligned double and quadruple patterning, SADP/SAQP). Each additional pass accumulates overlay errors and adds manufacturing steps, which reduces yield rates and raises cost-per-bit relative to EUV single-pass production. CXMT's current leading node — its internally labeled "G4" generation, roughly equivalent to the 1Z-class at approximately 16nm cell size — was achieved entirely via DUV multi-patterning.
Analysts at Seoul Economic Daily and TechInsights place the technology gap between CXMT's current DDR products and Samsung and SK Hynix's leading nodes at approximately two to three generations. CXMT has begun mass-producing DDR5, but its yields are not publicly disclosed and are believed by analysts to still lag the global leaders. Independent hardware testing by Hardware Unboxed in February 2026 found that CXMT-based DDR5 consumer kits delivered gaming performance essentially equivalent to Samsung or SK Hynix-based kits — suggesting the gap is primarily in manufacturing economics and process node advancement, not in the consumer-facing product as it currently ships.
The more significant competitive divergence is in high-bandwidth memory. HBM is a fundamentally different product architecture: it vertically stacks multiple DRAM dies using through-silicon via (TSV) connections — microscopic copper pillars drilled through the silicon — and places the resulting stack directly adjacent to a GPU or AI accelerator on a silicon interposer. The result is memory bandwidth of approximately 1 terabyte per second, compared to roughly 50 gigabytes per second for conventional DDR5 — a 20-fold difference that is why Nvidia's AI accelerators demand HBM, not DDR.
SK Hynix commands roughly 56% of the HBM market. CXMT is at the sample-verification stage for entry-level HBM2, with HBM3 samples sent to Huawei for AI accelerator testing. Of CXMT's approximately 265,000 monthly wafer starts, roughly 5,000 — under 2% of total output — are currently dedicated to HBM, with that figure projected to rise to 55,000 by end-2027. While Samsung and SK Hynix race toward HBM4 mass production, CXMT is targeting HBM3E mass production in 2027.
That is a meaningful lag — but analysts note it is closing faster than the equipment constraint alone would predict. Industry analysis placed the overall memory technology gap between South Korea and China at approximately three years, narrowed from more than five in prior estimates, and noted that CXMT's real-world deployment of HBM chips in Huawei AI systems could accelerate yield learning substantially. The HBM TSV stacking process is not as directly dependent on EUV as leading-edge logic is, which means CXMT's DUV constraint is less absolute in advanced packaging than it is in flat lithographic scaling.
The commercial tension surrounding CXMT's IPO crystallized most vividly in the nine days leading up to it. On July 8, the Financial Times reported that Apple had begun active testing and qualification of CXMT's DRAM chips for devices sold in China — a stage more advanced than preliminary evaluation — while simultaneously leading a lobbying effort among US technology companies to seek White House and Commerce Department assurances that CXMT would not be added to the Entity List. That lobbying effort is ongoing. No purchase agreement has been announced.
The reason Apple needs assurances: CXMT currently sits on the Pentagon's Section 1260H list of "Chinese Military Companies" — firms the Department of Defense has determined have alleged links to the People's Liberation Army. CXMT was first added in January 2025, briefly appeared to be removed in a February 2026 update that was subsequently withdrawn without explanation, and was formally restored to the list in the Pentagon's June 8, 2026 update, which added 65 new entities in total. The 1260H designation does not bar US companies from purchasing from CXMT. Its practical consequences are different and potentially more consequential for Apple: effective June 30, 2026, the Department of Defense is prohibited from procuring goods or services from 1260H entities — meaning any Apple product that incorporates CXMT memory could become ineligible for US government procurement contracts. CXMT also faces elevated risk of designation on additional Treasury and Commerce restricted lists.
Adding geopolitical texture: South Korean prosecutors indicted 10 former Samsung Electronics employees in December 2025 for allegedly transferring Samsung's 10nm DRAM process technology to CXMT, with estimated damages of approximately 5 trillion won. CXMT has not been charged in that proceeding; the case concerns the former Samsung employees.
Read more: CXMT DDR5-8200 Validated on MSI AM5 Boards, But Pentagon Keeps It on Military List
CXMT is a B2B chip supplier, not a consumer device manufacturer. Its DRAM modules do not independently collect or transmit user data — they process data at the direction of the host device they are installed in. But the company's legal obligations under Chinese law are relevant to any enterprise, system integrator, or supply-chain planner considering sourcing CXMT chips for sensitive applications.
Under China's National Intelligence Law, passed in 2017 and amended in 2018, all organizations and citizens are legally required to "support, assist, and cooperate with national intelligence efforts" (Article 7). Article 14 separately authorizes intelligence agencies to demand that assistance. The Counter-Espionage Law (2014) adds that organizations and individuals "shall provide [requested information] truthfully and may not refuse." China's Cybersecurity Law (2016) and Data Security Law (2021) impose additional requirements for data localization and government access.
Legal scholars debate whether Article 7's cooperation obligation requires affirmative intelligence collection or only assistance when requested. What is not debated is that the obligation applies regardless of a company's stated privacy policies, its Western subsidiaries, or the geographic location of its data servers. State-owned shareholders hold 36.29% of CXMT's equity pre-IPO, and the Chinese government's semiconductor "Big Fund" is a major investor. The Pentagon's PLA-affiliation determination on the 1260H list adds a separate US-government layer of concern.
For enterprises evaluating CXMT memory for sensitive government, defense, or intelligence-adjacent workloads: that legal framework is the correct analytical starting point, not the chip's benchmark scores or its cost-per-bit.
CXMT has earmarked the base ¥57.9 billion raise across three main buckets: approximately ¥7.5 billion for wafer manufacturing production-line technology upgrades; ¥13 billion for DRAM technology upgrades; and ¥9 billion for forward-looking technology research and development. The company has flagged capacity expansion plans that would take monthly wafer output from roughly 320,000 today to 420,000 by 2027, through new facilities in Shanghai, Beijing, and a large manufacturing cluster in Hefei. SemiAnalysis projects CXMT could account for approximately 17% of global DRAM supply by late 2028. Analysts at Counterpoint Research argue the company would need at least one-sixth of the global DRAM market to be viewed as a genuine peer to the top three producers.
The fundraising haul looks comparatively modest against the arms race it is entering. SK Hynix completed a $26.5 billion Nasdaq listing just 10 days before CXMT's subscription opened. South Korea's government, in parallel with Samsung and SK Hynix, has unveiled a national semiconductor strategy totaling approximately $600 billion. Micron has committed $250 billion to US domestic DRAM manufacturing, with its Idaho facility projected to begin output in mid-2027.
The DRAM industry has cycled through nine major boom-and-bust periods over the past half-century. The current upcycle is structurally driven by HBM capacity reallocation — but once the major players' expanded capacity comes online, widely expected around 2028, conventional DRAM price dynamics could reverse sharply. Gartner projected in February 2026 that combined DRAM and SSD prices will surge 130% by year-end 2026 — but elevated prices are exactly what typically catalyze the capacity investment that ends the upcycle. Chairman Zhu Yiming acknowledged at an investor briefing that price volatility and uncertain AI capital-expenditure trajectories remain material risks. By 2030, CXMT targets approximately 75% of production to be LPDDR5 and DDR5 chips.
CXMT is a company with genuine, independently verified commercial scale. Fourth globally in DRAM market share. The first Chinese IDM to achieve mass DRAM production and profitability. A beneficiary of a structural supply dislocation that its larger rivals created. The 212× oversubscription reflects real commercial momentum, not speculative hype about a product that does not yet exist.
What CXMT does not yet have: EUV access, which means it cannot match the process-node economics of its three largest competitors at the leading edge. A disclosed DDR5 yield rate. Competitive HBM production at scale — less than 2% of its current output. Cost-per-bit parity — it still trails the incumbents by more than 30%. A cleared US national-security designation — the Pentagon's PLA-affiliation assessment, restored in June 2026, is the authoritative US government position. And the legal framework in its home jurisdiction — China's National Intelligence Law, Cybersecurity Law, and Data Security Law — creates cooperation obligations with Chinese government intelligence work that apply regardless of the company's stated corporate governance.
For investors in the Shanghai market, those constraints are priced into a 5.9× projected-earnings multiple that leaves enormous room for upside if CXMT closes the gaps. For Western enterprises evaluating CXMT as a DRAM supplier, they constitute the full decision framework — not a footnote to be weighed against the cost savings.
The 212× oversubscription reflects investor appetite for exposure to China's domestic semiconductor industry during a memory supercycle, not a judgment that CXMT has closed the technology gap. Chinese investors cannot easily access Samsung or SK Hynix equity directly; CXMT is the only way to buy a listed stake in domestic DRAM production. The IPO's low earnings multiple of 5.9× versus the sector's consensus 20× also creates a perception of value that is driving demand. The oversubscription is a market-sentiment signal, not a technology assessment.
CXMT uses deep-ultraviolet multi-patterning — a technique that splits a single circuit-printing pass into two to four separate exposures — to approximate the feature sizes that EUV-equipped rivals achieve in a single pass. Each additional pass adds overlay errors and manufacturing cost. At the consumer DDR5 level, independent testing has found CXMT-based kits perform comparably to Samsung and SK Hynix kits. The real cost of the EUV restriction is competitive: CXMT's cost-per-bit remains more than 30% higher than the incumbents, limiting its ability to compete on price in a post-supercycle environment and preventing it from reaching the highest-density nodes required for leading HBM products.
The 1260H list identifies companies the US Department of Defense has determined have alleged links to the People's Liberation Army. Buying from CXMT is not illegal for most US companies. However, any product incorporating CXMT components may now be ineligible for US government procurement contracts, effective June 30, 2026. Companies that supply the DoD — or that aspire to — face a direct supply-chain conflict. CXMT also faces elevated risk of designation on Treasury (NS-CMIC) and Commerce (Entity List) restricted lists. The designation is distinct from China's National Intelligence Law obligation, which applies independently.
The current profitability surge is a market-structure event, not a technology-efficiency story. Samsung, SK Hynix, and Micron shifted capacity to high-margin HBM, reducing conventional DRAM supply and driving up prices that CXMT captures. When those incumbents' expanded HBM and total capacity comes online — analysts point to roughly 2028 — conventional DRAM prices are expected to fall. CXMT's cost-per-bit disadvantage of more than 30% vs. the incumbents means it could face serious margin compression in a normalized price environment. The IPO proceeds are explicitly intended to fund the technology and capacity investments needed to close that gap before the cycle turns.
