Intel's next desktop CPU generation has a name, a branding structure, and a launch roadmap — and none of it arrives in a single day. Leaked internal Intel documents published by VideoCardz on Wednesday confirmed that Nova Lake-S desktop processors will carry the Core Ultra 400 designation, establishing them as Core Ultra Series 4 and skipping desktop Series 3 entirely. Independently corroborated Thursday by Tweaktown and ThePCEnthusiast, the disclosure includes the first public image of a Core Ultra 9 400K product logo and, more consequentially, maps out four separate embargo windows running from late January through September 2027 — with the 52-core flagship arriving last.

For anyone deciding whether to build, upgrade, or wait, this roadmap is the most specific public evidence yet of when and in what order Intel's most ambitious desktop platform arrives. Every Intel desktop buyer alive right now sits somewhere on that decision tree.

Series 3 Exists for Laptops Only

The branding gap is not a typo. Intel's Core Ultra Series 3 designation belongs to Panther Lake — a laptop-only platform built on Intel's 18A process node that began shipping in limited commercial configurations this year. Desktop buyers jump directly from the current Arrow Lake (Core Ultra 200) lineup to Core Ultra 400, with no Series 3 desktop product in between.

The leaked material establishes the Series 4 designation through an actual product logo — a Core Ultra 9 400K rendering — rather than through code strings or supply chain records alone. Intel's traditional K-suffix for unlocked desktop processors carries forward. The leaked material also confirms the upcoming Z990 and Z970 chipsets will accompany the platform — with Z990 targeting the enthusiast and overclocking tier.

Four Embargo Windows, Not One Launch Day

The most operationally useful part of the disclosure is its granularity. Rather than a single launch date, the internal roadmap maps four overlapping embargo stages — each covering news announcement, reviews publication, and retail availability — that together span the better part of 2027:

Wave 1 (late January – March 2027): The 28-core DS packages launch first. Per prior leaks, this configuration uses a single compute tile — making it the platform's conventional entry point for builders who want Nova Lake without the dual-tile complexity.

Wave 2 (March – April 2027): Unlocked 28-core K-series models follow, opening the platform to overclockers and performance enthusiasts.

Wave 3 (late March – May 2027): Intel widens the lineup with 16-core and 8-core SKUs aimed at mainstream buyers who don't need the enthusiast core counts.

Wave 4 (late May – September 2027): The 52-core dual-tile DS flagship closes the rollout. The width of this window — potentially stretching into Q3 2027 — reflects the engineering complexity of shipping dual-tile silicon at scale.

ThePCEnthusiast noted that each embargo window covers multiple release phases, meaning the actual consumer availability dates will compress into narrower periods within each range.

Two New Core Designs and the First-Ever Intel Desktop with 512-bit on Every Core

Nova Lake-S introduces two entirely new microarchitectures. Coyote Cove replaces the Lion Cove P-cores in Arrow Lake. Arctic Wolf replaces Skymont as Intel's E-core design. Both represent clean-sheet redesigns rather than architectural refreshes.

The most consequential technical fact embedded in both designs is something confirmed independently by a July 7 Linux kernel patch from developer Eric Biggers, which explicitly enabled native 512-bit vector execution for the INTEL_FAM6_NOVALAKE processor family. Tom's Hardware and TechPowerUp read the code the same way: both Coyote Cove P-cores and Arctic Wolf E-cores get identical 512-bit vector width, as confirmed by the Linux kernel patch analysis.

That's a bigger shift than the headline suggests.

When Intel launched Alder Lake in November 2021, it disabled AVX-512 — the 512-bit vector instruction set that accelerates video encoding, AI inference, cryptography, and scientific simulation — because Gracemont E-cores couldn't execute it. The scheduling problem was fundamental: if a thread migrated from a P-core to an E-core mid-execution on a 512-bit instruction, the E-core had no execution unit for it. Intel's answer was to disable AVX-512 platform-wide via a March 2022 microcode update, stranding the feature until now. Rocket Lake, released in early 2021, was the last Intel consumer CPU to ship with functional AVX-512.

On Nova Lake, Arctic Wolf E-cores are built with native 512-bit execution units from the outset. Intel's unified AVX10.2 vector ISA provides a single, converged instruction set that runs identically across both core types, meaning Thread Director can schedule any thread — including 512-bit workloads — to any available core without risking a fault or a frequency cliff.

The practical upside is direct. Software developers who have maintained dual codepaths since 2021 — one for AVX2-capable systems, one for AVX-512-capable ones — can collapse to a single AVX10.2 binary when Nova Lake ships. The RPCS3 PlayStation 3 emulator, which has documented frame-rate gains from 512-bit code paths, benefits immediately on hardware that actually supports them. FFmpeg, HandBrake, x265, OpenSSL, and llama.cpp (the local AI inference runtime) all carry AVX-512-optimized routines that have been dormant on consumer Intel for nearly five years.

bLLC: Intel's On-Die Answer to AMD's Stacked Cache

Intel's answer to AMD's 3D V-Cache dominance in gaming is called bLLC (big Last Level Cache), and its architecture is deliberately different from AMD's approach. AMD stacks additional SRAM vertically on top of each compute CCD using Through-Silicon Via bonding — a technique that maximizes cache density per die but routes heat through the stacked silicon layer, limiting sustained clock speeds. Intel's bLLC integrates large cache directly into the compute tile itself, sitting on-die rather than on top.

Per leaks corroborated by multiple hardware outlets, the cache lineup breaks down across the Nova Lake-S family as follows:

• Dual compute tile flagship (52-core): 288 MB total bLLC (144 MB per tile)
• Single compute tile high-end (28-core K-series): 144 MB bLLC
• Mid-range single tile configurations: 108–132 MB depending on core count

AMD's top current X3D CPU, the Ryzen 9 9950X3D, carries 208 MB of total cache — making Intel's dual-tile flagship, at 288 MB, about 38% larger by raw cache volume. Early performance projections from Tweaktown suggest bLLC-equipped Nova Lake-S chips could outperform Arrow Lake by 30 to 45 percent in gaming workloads — though those projections have not been verified by independent benchmarks.

The 52-Core Flagship and Its Power Reality

The Nova Lake-S lineup's top SKU is a different category of desktop CPU. Sixteen Coyote Cove P-cores, 32 Arctic Wolf E-cores, and four low-power E-cores spread across two compute tiles produce a 52-core configuration — a core count Intel has historically reserved for Xeon workstation and server platforms, now arriving on a consumer desktop socket. The current Arrow Lake flagship, the Core Ultra 9 285K, ships with 24 cores.

The power requirements that accompany those cores are real and demand planning. Reliable leaker Jaykihn confirmed a 474W PL2 (Power Limit 2 — the short-duration turbo ceiling) for the dual-tile configuration, as reported by HotHardware. PL2 represents the maximum power the CPU can draw during boost periods; it can be sustained for several seconds at a time during demanding workloads. A separate earlier report from leaker kopite7kimi placed the PL4 emergency protection limit above 700 watts, per Tom's Hardware. PL4 is not a normal operating state — it's the electrical ceiling Intel sets to protect hardware when power limits are removed in BIOS, not a sustained load figure.

For context, Intel's flagship desktop chips have hovered near 250W in PL2 since 10th Gen (Comet Lake), making the dual-tile Nova Lake a roughly 90% increase in boost power headroom. This elevated ceiling applies to the dual-tile configuration specifically — single-tile 28-core models carry substantially lower power profiles.

High-end Z990 motherboards are expected to include up to three EPS 8-pin power connectors rather than the traditional one or two, according to reporting from Tom's Hardware and Club386. One EPS 8-pin connector supplies approximately 150W from ATX trace capacity; two cover the full 474W PL2 target at stock settings. A third connector's primary purpose is extreme overclocking headroom.

LGA 1954 Means a New Motherboard, New Memory, and No Upgrade Path From Arrow Lake

Nova Lake-S moves to a new LGA 1954 socket. The 103-contact expansion over Arrow Lake's LGA 1851 is not a cosmetic change — it exists to support the platform's expanded power delivery architecture across its multi-tile design. Any current Intel LGA 1851 motherboard, including all Z890 and Z790 boards, is incompatible with Nova Lake and cannot be upgraded.

This is not a new situation for Intel platform buyers — the company has not maintained socket longevity across generations for over a decade. But it is an especially pointed moment to note it: AMD's AM5 platform, in use since 2022 with Zen 4, has been confirmed compatible through at least Zen 6 (Olympic Ridge). A buyer who invested in an AM5 motherboard for a Ryzen 7000 series chip in 2022 can still upgrade to AMD's current and upcoming generation without replacing the board, as outlined in TechTimes' prior coverage of Arrow Lake's platform dead-end.

The full platform cost of an early Nova Lake build should be calculated as: new CPU + new LGA 1954 motherboard (Z990 for high-end, Z970 for mainstream) + DDR5 memory. Intel reports existing Socket V-compatible coolers may maintain mechanical compatibility with LGA 1954 where mounting dimensions align — so premium 360mm AIOs and large tower coolers may transfer. DDR5 memory prices have risen more than 170% year-over-year as AI data center demand diverts DRAM production away from consumer channels, a factor that further elevates total build cost for Wave 1 adopters.

Intel confirmed DDR5-8000 as the headline specification for Nova Lake-S, with support for CUDIMM and CSODIMM configurations carrying over from Arrow Lake.

AMD's Desktop Refresh Is Also Targeting 2027

Intel's roadmap disclosure arrives as AMD aligns its own next-generation desktop platform to the same general window. AMD's Zen 6 desktop lineup, codenamed Olympic Ridge, is currently projected for 2027 following reports that AMD shifted the platform from a 2026 target, with priority going to EPYC server processors and Zen 6 APUs ahead of the desktop SKUs. AMD has not confirmed specific desktop SKUs, core counts, or launch dates for Olympic Ridge.

The AM5 socket advantage — Olympic Ridge is expected to maintain compatibility with existing 800-series AM5 motherboards — represents a structural platform longevity difference that Intel's four-wave 2027 rollout does not address. AMD's X3D gaming performance lead, sustained across multiple generations, is the gap Intel's bLLC architecture is specifically designed to close.

What the Manufacturing Picture Means for Supply

Nova Lake-S production involves multiple process nodes across its multi-tile architecture. Based on current reporting, Intel's entry-level configurations are expected to use Intel's own 18A-P process — a variant of the company's leading-edge 18A node featuring RibbonFET gate-all-around transistors and PowerVia backside power delivery, which Intel moved into risk production in June 2026. Mainstream Nova Lake compute tiles are expected on TSMC's N2P process.

Intel's foundry reported an 18A yield rate of 85% as of July 15, 2026, confirmed by a KeyBanc analysis following ASML's announcement that Intel is the first company shipping high-volume chips on High-NA EUV lithography, as reported by TechTimes. The manufacturing split across nodes is one factor shaping the staggered launch schedule — Intel must coordinate supply from internal and external fabs simultaneously before volume retail is possible.

Intel has not confirmed any product names, launch dates, power specifications, or pricing associated with Core Ultra 400. All roadmap details disclosed here should be treated as unconfirmed internal planning material until an official announcement, currently expected at CES 2027 in January.

Frequently Asked Questions

When will Intel Core Ultra 400 (Nova Lake) CPUs actually be available to buy?

The first Nova Lake-S CPUs to reach consumers are expected in the late January to March 2027 window, based on the embargo schedule in the leaked roadmap. These will be 28-core single-tile DS configurations. Unlocked K-series models follow in March–April 2027, mainstream 16-core and 8-core models arrive between late March and May 2027, and the flagship 52-core dual-tile parts close the rollout sometime between May and September 2027. Intel is expected to announce the platform formally at CES 2027 in January. None of these dates are confirmed by Intel.

Will my current Intel LGA 1851 (Arrow Lake) motherboard work with Nova Lake?

No. Nova Lake-S uses a new LGA 1954 socket that is physically incompatible with existing LGA 1851 boards. Any Arrow Lake or Arrow Lake Refresh system built on LGA 1851 cannot be upgraded to a Core Ultra 400 processor. A Nova Lake build requires a new motherboard (Z990 for enthusiast, Z970 for mainstream) in addition to the CPU. By contrast, AMD's AM5 platform is expected to support Zen 6 (Olympic Ridge) processors without a motherboard change — a meaningful platform longevity difference between the two ecosystems heading into 2027.

How does Intel's bLLC cache compare to AMD's 3D V-Cache, and does it matter for gaming?

Intel's bLLC (big Last Level Cache) and AMD's 3D V-Cache both dramatically increase the amount of cache available to the CPU, which reduces how often the processor has to fetch data from slower system memory — the core reason large-cache chips excel in gaming. The approaches differ architecturally: AMD stacks additional SRAM vertically atop the compute die using Through-Silicon Via bonding, while Intel integrates bLLC directly into the compute tile itself. Intel's approach avoids the thermal penalty of routing heat through a stacked silicon layer, but requires dual compute tiles to reach the 288 MB total in the flagship SKU. AMD's current top gaming chip, the Ryzen 9 9950X3D, carries 208 MB of total cache. Early projections suggest Nova Lake's bLLC-equipped parts could deliver 30 to 45 percent better gaming performance than Arrow Lake, but independent benchmark confirmation awaits actual hardware.

Should I build a new desktop PC now with Arrow Lake, or wait for Nova Lake?

Anyone building from scratch in mid-2026 faces a genuine trade-off. Arrow Lake (Core Ultra 200S) is available and performing adequately, but the LGA 1851 platform it requires has no forward upgrade path to Nova Lake — making any LGA 1851 investment a one-generation commitment. Nova Lake's first wave arrives in approximately six to seven months. Given that Nova Lake also requires a new motherboard and DDR5 memory (which remains expensive due to AI-driven DRAM demand), the cost difference between building now and building later is less about the CPU price and more about platform longevity: LGA 1851 reaches end-of-life with the current generation, while LGA 1954 will support at least the opening years of Nova Lake's product family. The answer depends on urgency — if a working system is needed now, Arrow Lake at current prices is a reasonable choice; if the goal is the best possible platform investment for 2027 and beyond, waiting is the clearer call.