On March 14, 2025, Shenzhen Guowei Electronics Co., Ltd. published patent CN119623365A, titled "A Method, Device, Equipment, and Readable Storage Medium for Generating a Digital Layout of a Chip." This patent revolutionizes chip design by enabling the extraction of features from the chip's physical layout, the generation of circuit netlists, and the automated placement of PDK devices. These advancements have the potential to drastically enhance design efficiency, minimize manual intervention, and decrease the error rate in identification processes.