From July 26 to 29, the 63rd International Design Automation Conference (DAC) took place in Long Beach, USA. During the conference, the School of Integrated Circuits at Huazhong University of Science and Technology (HUST) presented three groundbreaking research achievements in the domains of in-memory computing and brain-inspired computing. These advancements span point cloud processing, Transformer acceleration, and sparse optimization of spiking Transformers.

One notable breakthrough is the in-memory computing system built on three-dimensional vertically stacked resistive random-access memory (RRAM) arrays. This system successfully solved matrix equations with floating-point precision, significantly enhancing both energy efficiency and computational accuracy.

Another achievement is the 40nm FP8 floating-point in-memory computing macro unit designed for end-side Transformer inference. By optimizing the overhead associated with floating-point post-processing accumulation, this unit achieved an impressive 6.66-fold increase in energy efficiency.

To tackle the challenges posed by unstructured sparsity in spiking Transformers, the researchers proposed the SPARTA architecture. This innovative architecture leverages dynamic token skipping and spiking-aware token prediction algorithms, combined with a heterogeneous RRAM in-memory computing framework. As a result, it achieved remarkable improvements in speed and energy efficiency, surpassing a hundredfold increase.

These accomplishments underscore significant milestones achieved by HUST’s School of Integrated Circuits in the fields of in-memory computing and brain-inspired computing, showcasing their commitment to pushing the boundaries of technological innovation.