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The research team, headed by Liang Xuelei from the School of Electronics at Peking University, has achieved remarkable advancements in the exploration of carbon nanotube monolithic three-dimensional i
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Following the development of FinFET and GAA nanosheets, Complementary Field-Effect Transistor (CFET) technology, which involves the vertical stacking of N-FETs and P-FETs, has risen to prominence as a pivotal architecture. This technology is instrumental in boosting logic density, minimizing interconnect lengths, and decreasing cell area. The International Roadmap for Devices and Systems (IRDS) has recognized CFET as a crucial device form for technology nodes below 2nm, with anticipated practical implementation around 2032. Moreover, CFET technology has been a focal point at recent international semiconductor conferences, including IEDM and VLSI, drawing considerable interest.
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