Recently, a groundbreaking research paper titled "R2G: A Multi-View Circuit Graph Benchmark Suite from RTL to GDSII" by Professor Sun Daying’s research group at the School of Integrated Circuits (School of Microelectronics), Nanjing University of Science and Technology, has been successfully accepted for presentation at the prestigious 2026 IEEE Conference on Computer Vision and Pattern Recognition (CVPR 2026). This marks a significant milestone for interdisciplinary research at the intersection of AI and integrated circuits.

The study introduces R2G, a comprehensive multi-view circuit graph benchmark suite designed to tackle key challenges impeding the progress of Graph Neural Networks (GNNs) in physical design tasks, such as congestion prediction and wirelength estimation. These challenges stem from inconsistent circuit representations and the absence of standardized evaluation protocols. R2G addresses these issues by standardizing five stage-aware views, encompassing over 30 open-source IP cores (with node/edge counts reaching up to 10⁶). It also offers an end-to-end DEF-to-graph flow, spanning synthesis, placement, and routing, and includes essential tools such as loaders, unified partitioning, domain-specific metrics, and reproducible baselines.

Through systematic experimentation with models like GINE, GAT, and ResGatedGCN, the research group uncovered critical insights. They found that view selection significantly influences model performance, with the node-centric view exhibiting superior generalization capabilities during the placement and routing stages. Additionally, the depth of the decoder head emerged as the primary factor driving prediction accuracy. This research provides a valuable new benchmarking tool for the field of Electronic Design Automation (EDA) for integrated circuits, paving the way for advancements in autonomous digital chip design.