On May 25, 2026, at ISCAS 2026, He Tingbo, Huawei's Director and President of the Semiconductor Business Department, announced that a new Kirin mobile chip will be launched in autumn, featuring the first adoption of logic folding technology. This technology utilizes a dual-layer vertical stacking architecture to shorten the internal signal transmission distance within the chip, reduce resistance and capacitive load, compress signal delay, and achieve a leap in performance. Compared to traditional 2D designs, the Kirin 2026 chip sees a 53.5% increase in transistor density, reaching 238 MTr/mm², a 41% improvement in P-core energy efficiency, and a 12.7% increase in peak frequency to 3.1GHz. Huawei also proposed the "Tao (τ) Law," aiming to systematically reduce the time constant τ. Through innovative technologies like logic folding, it continuously enhances transistor density and system performance. It is projected that by 2031, the transistor density of high-end chips will reach the equivalent level of 1.4-nanometer process technology.