On April 23, 2026, NEO Semiconductor, a U.S. startup specializing in artificial intelligence and storage technology, announced the successful completion of proof-of-concept for its 3D X-DRAM technology. This technology enhances memory capacity through a vertical stacking design and can be manufactured using existing 3D NAND Flash production lines, offering a high-density, low-power, and low-cost memory solution for AI applications. According to reports, the proof-of-concept chip was developed in collaboration between NEO Semiconductor and the Industry-Academia Innovation Institute at National Yang Ming Chiao Tung University in Taiwan, with tape-out and testing completed at the Taiwan Semiconductor Research Institute. Test results show that the 3D X-DRAM achieves read/write latency below 10 nanoseconds, with data retention time exceeding 1 second at 85°C (15 times that of JEDEC standard DRAM), and bitline and wordline interference resistance both exceeding 1 second, demonstrating significantly superior performance compared to traditional DRAM. NEO Semiconductor stated that the technology enhances capacity by increasing the number of stacked layers, with the first design adopting a 230-layer stack to achieve a 128Gb core capacity, an 8-fold improvement over current 2D DRAM. Subsequent architectures can scale up to 512Gb capacity, with a single chip offering 10 times the capacity of traditional DRAM modules. The company projects that, based on 3D X-DRAM technology, the goal of achieving a 1Tb capacity per memory chip could be realized between 2030 and 2035, with single dual-sided memory modules reaching 2TB and server memory modules reaching 4TB, all while significantly reducing costs. Additionally, NEO Semiconductor introduced X-HBM, an ultra-high-bandwidth memory architecture based on 3D X-DRAM, featuring a single-layer capacity of 512Gb and a bit width of 32K, delivering 16 times the bandwidth and 10 times the density of traditional HBM, surpassing industry performance projections for HBM8 by 15 years. The successful proof-of-concept marks a critical step forward for 3D DRAM technology, transitioning from theory to commercialization. Its compatibility with existing 3D NAND production lines offers the potential for rapid, large-scale mass production (mass production).