The AVX - 512 instruction set was once a signature technology of Intel. However, its overall capabilities were constrained because of the incorporation of the big.LITTLE core architecture in Intel's 12th - gen Core processors. The E - cores in these processors did not support this instruction set. In stark contrast, AMD integrated the AVX - 512 instruction set into its Zen4 architecture. Moreover, AMD is set to further bolster AI support in the Zen7 architecture. This enhancement encompasses the inclusion of a brand - new matrix engine, an expansion of AI data format processing capabilities, and the optimization of AI pipeline structures. The Zen7 is slated to adopt future process nodes and is projected to hit the market in the 2027 - 2028 timeframe. Its initial applications will be in the EPYC Verano series data center CPUs, signifying the official entrance of the x86 architecture into the AI - native era.