AMD said at noon ET on Tuesday that its 6th Gen EPYC "Venice" SP7 server processors are available in OEM and ODM systems, and Tom's Hardware testing published Tuesday found the 256-core EPYC 9996 slower than the 192-core EPYC 9965 from the prior "Turin" generation in a ClickHouse database test. Buyers who size analytics servers by core count alone should run their own workloads before ordering the flagship.

The same testing found real gains. A dual-socket EPYC 9996 system scored 93% higher than a dual-socket EPYC 9965 system in an unofficial SPEC CPU 2026 integer-rate estimate, and Blender ran 30% to 40% faster on the 9996 than on the 9965. ServeTheHome also published a first look at the platform.

Most earlier Venice-versus-Vera comparisons came from AMD itself. The company says the EPYC 9996 delivers 2.24 times the platform-level SPECrate 2026 Integer throughput of Nvidia's 88-core Vera, and that its 96-core high-frequency Venice part delivers 1.2 times Vera's per-core performance. Launch coverage also cites up to 20% higher single-core performance than Vera. The 2.24 times headline compares a 256-core chip with an 88-core chip, so the per-core figure is the closer race.

ClickHouse Regression Shows 256 Cores Do Not Scale Evenly Across Workloads

Tom's Hardware reports that the EPYC 9996 regressed against the EPYC 9965 in ClickHouse, an open-source column-oriented database built for real-time analytical queries. The review's text gives no size for the drop and does not say whether the test ran on one socket or two. The author suggests cache coherency problems at higher core counts as the likely cause, an explanation the review offers as plausible rather than measured.

The result varied with cache state and chip. Vera led from a cold cache, and the 96-core EPYC 9686F led once the cache was warm.

A suite-level score can hide a regression like this one. SPEC reports a geometric mean of many sub-tests, so one strong result can offset weak ones. Database and analytics buyers should read the per-workload results, not the composite.

Eight Chiplets and Cache Coherency Explain Why More Cores Can Mean Slower Queries

AMD's flagship 9996 uses eight compute chiplets of 32 cores each, for 256 cores and 1,024 MB of L3 cache in one socket. Turin's 192-core part spreads its cores across up to 12 chiplets of 16 cores each.

Cache coherence is the rule set that keeps every core's cached copy of shared data consistent. Snooping protocols broadcast each request to every cache and do not scale, so larger systems generally use directory protocols, which add a lookup step and latency on each miss. Communication between chiplets also costs more power and time than communication inside one die.

That is a general property of many-core designs, and the launch-day tests did not isolate it. It does suggest where to look. Workloads whose threads rarely touch shared data, such as Blender renders, can use every added core. Workloads that update shared structures across many threads pay a coordination cost that grows with core count.

Thread Count Complicates Venice's 93% SPEC Estimate

Zen cores use two-way simultaneous multithreading, so 256 cores present 512 threads per socket. A dual-socket EPYC 9996 system therefore presents 1,024 threads against 768 for a dual-socket EPYC 9965. The review's SPEC figures do not separate the effect of extra threads from the effect of faster cores. Threads on one core share resources, so extra threads help only as far as a workload leaves stalls to hide.

The SPEC figures are unpublished SPEC estimates using GCC 16 on Venice systems, while the other systems used GCC 15.2 and all used the jemalloc memory allocator. Compiler choice and flags change results, so scores from different toolchains are not directly comparable.

Per-core gains are smaller than the throughput headline. ServeTheHome puts Zen 6's IPC gain at about 20% over Turin. Instructions per clock varies with the software and the memory hierarchy, so it is a rough guide to buyer outcomes.

Nvidia Vera Still Wins Some Memory Tests While 96-Core 9686F Leads SPEC Rate

Tom's Hardware measured a dual-socket EPYC 9686F 17% ahead of Nvidia Vera in SPEC integer rate and about 40% ahead in floating-point rate. The 9686F also led Vera by about 32% in PyBench, a Python benchmark, and by more than twice in the CloverLeaf HPC test.

Memory results split. The 9996 systems led Vera by 11% to 19% in STREAM under the "true" thread-binding policy, but Vera pulled ahead under the "spread" policy, and the 9996 led in the MBW test only at a 128 MB array size. Setup matters: the Venice systems ran on AMD's reference platform with 2 TB of DDR5-12800 MRDIMM memory, while Vera used 1.5 TB of LPDDR5X SOCAMM2 memory. Blender was not run on Vera because no native Arm build was available.

AMD frames the launch around strong agentic AI performance claims, which Digital Citizen notes are company benchmarks that need independent testing.

Clock figures also disagree. ServeTheHome's final SKU table lists a 5.3 GHz boost for the 9686F, up from the 5 GHz AMD announced earlier, while Tom's Hardware lists 5 GHz. Confirm the shipping clock with your vendor.

Rated 600 W Default CPU Power Says Little About Measured Draw

The EPYC 9996 carries a 600 W power rating, up from 500 W for Turin and 400 W for Genoa. AMD calls the figure Default CPU Power, and Tom's Hardware lists it as adjustable from 400-600 W for the 9996. The 96-core 9686F is rated at 500 W. A dual-socket 9996 server therefore carries 1,200 W of default CPU power before memory, storage, or accelerators.

Tom's Hardware reported no measured power for its test systems, and the first page of ServeTheHome's coverage lists only rated peak figures. A power rating is a cooling target, and real draw can differ from it. AMD claims 3.3 times more performance per watt than Vera in general-purpose servers, a figure outside reviewers have not yet tested in the coverage reviewed here.

AMD Lists EPYC 9996 at $14,904 per 1,000 Units but Gives No Supply Figures

AMD's price list, which surfaced in late September and may change, puts the EPYC 9996 at $14,904 in 1,000-unit quantities. The 192-core EPYC 9965 launched at about $14,800, which puts the 9996 near $58 per core against roughly $77 for the 9965. Those are quantity list prices, not what an enterprise buyer pays per server.

AMD's Tuesday announcement gave no pricing, volume, or lead-time figures. AMD's page links a QCT announcement of general availability for Quanta Cloud Technology's QuantaGrid servers, and it named Lenovo, Hyve Solutions, and Cornelis among partners. AMD also says instances from Microsoft Azure and Oracle Cloud Infrastructure will soon be available, with no dates given.

SP8, Venice-X, and Verano Arrive After This Launch

Today's availability covers the SP7 socket only. AMD also lists SP8 processors spanning eight to 128 cores, and TechSpot reports 22 models starting at $700 for the first half of 2027. Venice-X adds 3D V-Cache, with 96 cores and 1,152 MB of L3 cache at the top of the range, and TechSpot places it later in 2027. Verano, branded EPYC 9006 LP, supports LPDDR5X memory and is meant to serve as a host processor for AI accelerators. Sources differ on the exact timing, so treat these dates as AMD's current plan.

What Should Buyers Test Before Ordering EPYC 9996?

Run your own workload on a dual-socket system with cold and warm caches, and test the memory thread-binding setting your software uses. Compare the 96-core high-frequency EPYC 9686F against the 256-core flagship if your work leans on shared data, and measure power at the wall rather than relying on the 600 W rating. Ask your OEM for lead times, because AMD has not published them.

The flagship's strength is density: more cores and threads per socket, at a price per core below its predecessor's. Testing published so far shows that density does not carry equally into every workload, and no outside reviewer has yet measured what it costs in power.

Frequently Asked Questions

Is the EPYC 9996 always faster than the EPYC 9965?

No. Tom's Hardware measured a regression from the 9965 to the 9996 in ClickHouse and suggested cache coherency as the cause, while the same testing found 30% to 40% gains in Blender. Results depend on how much a workload shares data across threads.

How much does the EPYC 9996 cost?

AMD lists it at $14,904 in 1,000-unit quantities. Server prices from OEMs will differ, and AMD's Tuesday announcement included no pricing.

Do Venice processors fit existing EPYC 9005 servers?

No. Venice uses the new SP7 socket, which is not backward compatible with SP5, the socket used by Turin.

When can Azure and Oracle customers rent Venice?

AMD says instances from both clouds will be available soon but gave no dates.