TSMC generated third-quarter revenue of US$46.72 billion, up 41.2% year-over-year and 16.2% sequentially, as demand for leading-edge manufacturing continued to expand. Net income reached NT$763.06 billion, up 68.7%, with diluted earnings of NT$29.43 per share, or US$4.60 per American depositary receipt. The October 15 results exceeded the company’s revenue guidance of US$44.6–45.8 billion.

The manufacturing mix continued shifting toward advanced nodes. The 2nm process accounted for 8% of wafer revenue, compared with 3% in the preceding quarter; 3nm contributed 33%, 5nm 28% and 7nm 10%. Together, 7nm and more advanced technologies generated 79% of wafer revenue. Gross margin was 66.4%, operating margin 58.7% and net profit margin 51.1%.

TSMC forecasts fourth-quarter revenue of US$52.3–54.3 billion, with gross margin of 65–67% and operating margin of 56.5–58.5%. It reaffirmed its 2026 capital budget of US$60–64 billion. Actual CapEx totaled US$13.84 billion in the third quarter and US$40.64 billion through September, almost matching the US$40.90 billion spent during all of 2025.

“Our business in the third quarter was supported by strong demand for our leading-edge process technologies,” said Wendell Huang, TSMC senior vice president and CFO.

Analysis

TSMC’s capital spending has moved onto a substantially higher trajectory. Annual CapEx increased from US$29.76 billion in 2024 to US$40.90 billion in 2025, a rise of approximately 37%. The current US$60–64 billion budget implies another 47–56% increase in 2026, bringing annual spending to roughly twice the 2024 level. These comparisons use actual spending for 2024 and 2025 and guidance for 2026.

The allocation shows where that money is directed: TSMC said in July that 70–80% of the 2026 budget would support advanced process technologies, approximately 10% specialty technologies, and 10–20% advanced packaging, testing, mask-making and other activities. This combines investment in transistor scaling with the manufacturing steps needed to assemble complex AI systems.

Taiwan remains central. TSMC is building 13 leading-edge and advanced packaging fabs over several years. N2 is ramping in Hsinchu and Kaohsiung, with annual N2-family capacity expected to more than double in 2027. Two additional Tainan 3nm fabs target volume production in the first halves of 2027 and 2028; TSMC is also converting 5nm tools to 3nm. A14 volume production remains scheduled for 2028.

Arizona adds a growing U.S. manufacturing and packaging cluster. TSMC’s planned investment reached US$265 billion following July’s additional US$100 billion commitment. That is a multiyear project commitment, separate from the company’s annual global CapEx budget. The first Phoenix fab has produced N4 chips since late 2024. Tool installation is underway at the second fab, with 3nm volume production now scheduled for the third quarter of 2027. The third fab targets N2 and A16, while initial construction stages have begun for a fourth fab and the first advanced packaging facility.

Japan’s expansion is centered on Kumamoto. The first JASM fab began volume production at the end of 2024 using specialty technologies. The second fab is being developed for 3nm, with volume production scheduled for 2028, extending Japan’s role into leading-edge logic manufacturing for AI-related demand.

The editorial implication is that TSMC’s investment cycle extends across both manufacturing technology and geography. More wafer output must be matched by packaging and supporting supply-chain capacity before it translates into deployable AI hardware. The announced projects also have different delivery dates: the current spending increase supports capacity arriving over several years.