
Mobilint
A humanoid robot that must ping a remote server before moving its arm is not safe to deploy in a home. That engineering constraint — not a commercial preference — is the reason South Korea has placed a ₩800.2 billion (~$606.2 million USD) national bet on domestic on-device AI chips, and why Seoul-based semiconductor startup Mobilint was named lead researcher on that program's humanoid robotics arm on October 22, 2026.
The designation makes Mobilint the central technical organization responsible for delivering the NPU architecture that South Korea intends to install inside the next generation of physical AI robots — robots that, by design, cannot afford to wait for a network response.
Mobilint's mandate sits inside the Ministry of Trade, Industry and Energy's K-On-Device AI Semiconductor Technology Development Program, managed by the Korea Planning & Evaluation Institute of Industrial Technology (KEIT). Korea's ₩800.2 billion chip program carries a total budget running from 2026 through 2030, and targets the development of ten categories of domestically produced, production-ready on-device AI chips across four priority sectors: automotive, IoT and home appliances, machinery and robotics, and defense.
The program launched formally in June 2026 at the M.AX Alliance AI assembly, where the Ministry assembled eleven institutional signatories — including Samsung Electronics as the foundry partner and EDA firms Synopsys and Cadence — to address the manufacturing bottleneck Korean fabless chip designers face when moving from design to wafer production. Demand-side anchors for the program include Hyundai Motor, LG Electronics, Doosan Robotics, and Korea Aerospace Industries (KAI) — companies that will eventually purchase the chips these startups build.
Mobilint has been designated the lead research organization for the robotics-focused arm: specifically, the design of a co-optimized NPU and software stack for humanoid robot on-device AI inference. The mandate covers the chip itself, its compiler and model execution environment, and ultimately a deployable accelerator module suitable for installation inside robot bodies.
The engineering case behind Mobilint's platform starts with a hard constraint that general-purpose silicon cannot solve at the required power budget.
Humanoid robots perceive their environment through cameras and sensors, translate that sensory data through layered AI models, and issue physical joint commands — all within a control loop that must close in milliseconds. The two AI model families that matter most are vision-language models (VLMs), which give robots the ability to understand scenes and language, and vision-language-action models (VLAs), which map visual inputs directly into motor commands such as joint angles, gripper states, and movement trajectories.
VLA models operate in a two-stage pipeline: a VLM encoder processes the visual and text inputs into latent tokens, and an action decoder maps those tokens to continuous motor commands. To achieve smooth, dexterous manipulation, state-of-the-art systems such as the π0 architecture require this full pipeline to run at approximately 50 Hz — meaning a new inference cycle must complete every 20 milliseconds. Cloud round-trips for data processing typically add 100 to 300 milliseconds of latency, dwarfing that budget. Any network interruption eliminates the control signal entirely.
The result is that cloud-dependent AI in a humanoid robot is not merely slow — it is a safety failure mode. Documented humanoid robot incidents in 2025 and 2026, including collisions with bystanders and falls during public demonstrations in China, trace partly to control failures during high-load or communication-interrupted inference cycles.
Running a VLA model at 50 Hz on general-purpose silicon requires substantial power — far beyond what an embedded robot chassis can sustain. Mobilint's REGULUS SoC achieves over 10 TOPS at under 3 watts by co-designing the NPU hardware topology with the compiler from the ground up, eliminating general-purpose overhead and enabling the chip to match its memory bandwidth, compute scheduling, and power states to the specific inference pattern of a two-stage VLA pipeline. This is the structural distinction from software-only optimization approaches — quantization and pruning applied to commercial SoCs can reduce model size but cannot provide deterministic latency guarantees when the silicon was not designed for the task.
The platform also handles computing resource allocation in real time: latency-critical tasks such as balance control and collision avoidance receive priority over less time-sensitive operations running concurrently on the same hardware. That allocation logic, implemented at silicon level, is a necessary component of any safe deployment in a home or workplace.
The TOPS metric itself warrants a note of caution: vendors define "operations" differently — across INT8, INT4, and FP16 precision formats — making cross-vendor TOPS comparisons unreliable without standardized test conditions.
Mobilint's platform will undergo phased integration testing inside LG Electronics' home robot platform for everyday environments, with LG already a demand-side participant in the K-On-Device AI Home sub-project alongside semiconductor firms HyperXcel and Mobilint, Sogang University's industry-academic cooperation foundation, and the Korea Electronics Technology Institute (KETI). LG's home robot at CES 2026 debuted in January as part of the company's "Zero Labor Home" vision — a dual-arm system designed to perform household tasks including folding laundry and loading appliances, navigating autonomously through domestic environments.
The integration arrangement follows from a multi-party collaboration disclosed in September 2026. Nota Inc., a Korean AI model optimization company, disclosed a Nota Inc. VLA partnership with LG Electronics and Mobilint specifically to prepare VLA models for on-device inference on Mobilint's NPU architecture. Nota is responsible for compressing and restructuring the vision-language-action models to fit within the NPU's computational envelope and verifying real-time inference performance in the robot's operating environment. The goal, Nota CEO Chae Myeong-su said at the time, is a humanoid capable of perceiving without cloud dependency — acting autonomously without any reliance on external connectivity.
While the government contract focuses on humanoid robots, Mobilint intends the resulting platform to serve a broader category of physical AI applications: service robots, autonomous mobile robots (AMRs), smart home appliances, and AI cameras — all of which share the on-device, low-latency inference requirements that motivated the humanoid work.
The roadmap reflects Mobilint's existing product lines. The ARIES high-performance edge NPU delivers up to 80 TOPS at 25 watts, powering the MLA100 PCIe accelerator card and the MLX-A1 edge AI box. The REGULUS system-on-chip integrates NPU, CPU, ISP, and video codec, delivering over 10 TOPS at under 3 watts — targeting embedded applications including drones and robots. Mobilint's silicon has already been deployed in the aerospace sector: Korea Aerospace Industries (KAI) integrated Mobilint hardware into a satellite AI fault module for an on-orbit AI operations system.
Founded in 2019 by CEO Dongjoo Shin, who has researched deep neural network ASIC design since 2013, Mobilint is among a cluster of Korean AI chip startups — including Rebellions, DEEPX, and HyperXcel — that have attracted government and private investment as South Korea seeks to reduce its dependence on foreign AI silicon.
Mobilint closed a ₩70 billion Series C round (~$53.0 million USD) in April 2026, with participation from Praxis Capital Partners, POSCO INVESTMENT, and Company K Partners. The round was tied in part to a commercial deal with POSCO DX to embed Mobilint's NPU into PosMaster, POSCO DX's industrial control system, enabling on-device AI on factory floors. Prior rounds had totaled approximately $18.5 million, bringing total disclosed funding to roughly $71.5 million. Korea Development Bank is among the institutional backers. The World Economic Forum has recognized Mobilint as a WEF Technology Pioneer.
The company has claimed back-to-back first-place finishes in the MLPerf inference benchmark in 2020 and 2021, and is a founding member of MLCommons, the consortium that administers the industry-standard benchmark.
Mobilint is a fabless semiconductor company, meaning it designs chips but outsources wafer fabrication to foundries. The K-On-Device program's inclusion of Samsung Electronics as foundry directly addresses the manufacturing bottleneck Korean fabless designers have historically faced — the capacity and access constraints that make moving from silicon design to production a separate, expensive challenge.
Mobilint's government-backed push enters an active competitive field. Korean competitor DEEPX announced a DEEPX Hyundai Robotics LAB partnership in April 2026 to jointly develop physical AI compute infrastructure around DEEPX's DX-M2 chip, also targeting VLA and VLM models for humanoid deployment. The physical AI semiconductor market is a significant forecasted opportunity — though independent market estimates vary, and investors should note that headline figures cited by individual competitors carry self-interested framing.
Internationally, Renesas Electronics established a dedicated Renesas Physical AI Division in July 2026 and opened a Physical AI and Robotics Lab in Beijing in August, targeting humanoid robot silicon. Micron has disclosed development of Micron humanoid robot memory architectures specifically designed for the latency and bandwidth requirements of humanoid robot systems. According to Interact Analysis, each humanoid robot contains 1,000 to 2,000 semiconductor chips, with semiconductors rising from approximately 10% of the humanoid robot bill of materials in 2025 to an estimated 21.3% by 2031 — a structural demand expansion that partly explains the scale of the capital entering the field. Humanoid robot production grew tenfold in 2025 alone.
The parallel timing of these moves reflects a broad industry conviction — and an increasingly explicit government position in Seoul — that physical AI is moving from research into production hardware, and that control over the silicon layer will determine which countries and companies capture the market. For South Korea, the Mobilint designation as lead researcher on Korea's most significant AI chip program represents the first concrete milestone in an effort to ensure that the robots deployed in Korean homes and factories do not depend entirely on foreign-controlled compute to know where they are and what to do next.
Exchange rate as of October 23, 2026; conversions are approximate.
Cloud AI requires sending data to a remote server, waiting for a response, and receiving a command — a round-trip that typically adds 100 to 300 milliseconds of latency. Humanoid robots running vision-language-action models need to complete an inference cycle every 20 milliseconds (50 Hz) to maintain smooth, safe control of their joints. Any network interruption eliminates the control signal entirely. For tasks like balance correction and collision avoidance, that latency gap is the difference between safe operation and a robot that falls, tips, or injures someone nearby. On-device AI inference is not an optional performance upgrade; it is a safety requirement for physically deployed robots.
TOPS stands for tera operations per second — a measure of how many arithmetic operations a chip can perform per second, intended to capture AI inference throughput. The problem is that vendors define "operations" using different numerical precision formats: INT8 (8-bit integers), INT4 (4-bit integers), and FP16 (16-bit floating point). A chip rated at 80 TOPS in INT4 delivers significantly less practical throughput on full-precision workloads than that number implies. Cross-vendor TOPS comparisons are unreliable without knowing which precision format was used and under which benchmark conditions. Readers evaluating chips like Mobilint's ARIES (up to 80 TOPS at 25 watts) or REGULUS (over 10 TOPS at under 3 watts) should look for standardized benchmarks, such as MLPerf results, rather than headline TOPS figures alone.
South Korea's Ministry of Trade, Industry and Energy has explicitly stated an ambition for the country to become a leader in the physical AI era. The K-On-Device program is the structural mechanism: it funds ten categories of domestic on-device AI chips across four sectors — automotive, IoT and home appliances, machinery and robotics, and defense — with a ₩800.2 billion (~$606.2 million USD) budget running through 2030. The program also addresses a specific structural vulnerability for Korean fabless chip designers: the M.AX Alliance, formed alongside the program, includes Samsung Electronics as the designated domestic foundry, giving Korean chip startups a manufacturing pathway that does not depend entirely on TSMC or foreign foundry capacity. Countries that cannot design and manufacture their own physical AI chips risk deploying robots — in homes, factories, and infrastructure — whose computing is controlled by foreign entities operating under foreign law.
A VLA model works in two stages. First, a vision-language model (VLM) encodes the robot's camera inputs and any text instructions into a compact representation called a latent token — capturing what the robot sees and what it has been asked to do. Second, an action decoder maps that latent token into continuous motor commands: specific joint angles, rotation rates, and gripper states. The robot's actuators execute those commands, and the cycle repeats. State-of-the-art systems run this full pipeline at 50 Hz, meaning a new perception-to-action cycle completes every 20 milliseconds. The engineering challenge is that a VLA model capable of generalizing across diverse household environments requires billions of parameters — far too large to run efficiently on a general-purpose chip at that frequency within the power budget of a battery-operated robot. The solution is a co-designed NPU whose hardware topology and compiler are built specifically for the two-stage VLA inference pattern, eliminating the overhead of general-purpose computing and enabling deterministic latency guarantees.
