As integrated circuit density continues to escalate and transistor process nodes progressively shrink, the industry is fast approaching physical limitations. Three-dimensional complementary metal-oxide-semiconductor (3D CMOS) technology emerges as a promising avenue to surmount these barriers. Nonetheless, conventional silicon-based 3D CMOS integration technology grapples with the challenge of a substantial thermal budget, which not only amplifies process complexity and cost but may also compromise performance, thereby constraining its commercial viability.