JEDEC has officially introduced the HBM4 memory standard, which boasts a 2048-bit interface and an expanded channel count of 32, offering an impressive bandwidth of up to 2TB/s. This new standard embraces low-power design principles and maintains backward compatibility with HBM3. Additionally, the inclusion of the innovative DRFM function not only optimizes RAS performance but also fortifies resistance against row-hammer attacks, thereby facilitating AI and HPC applications to achieve more efficient and powerful computing capabilities.
