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ChinaChip Group Secures Patent for 'Gate-Level Circuit Partitioning Method Utilizing Cut Sets and Vertex Characteristics'
2025-04-19 /
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Author：小编
ChinaChip Group (Shenzhen) Co., Ltd. has recently been granted a patent titled 'Gate-Level Circuit Partitioning Method Utilizing Cut Sets and Vertex Characteristics', with authorization announcement number CN112883671B and an announcement date of February 14, 2025. The patent application was initially filed on February 24, 2021. This innovative method leverages principles from graph theory, particularly cut sets and vertex characteristics, to optimize gate-level circuits through sophisticated algorithms. The objective is to enhance circuit performance and reliability, thereby propelling ChinaChip Group forward with a technological edge and fortifying its position within the industry.
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