TSMC’s Second Plant in Kumamoto, Japan, Greenlights 3nm Chip Production with 6,000-Wafer Monthly Capacity
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Author:小编   

On October 18, 2026 (Beijing Time), reports emerged that Japan’s Ministry of Economy, Trade and Industry had recently approved TSMC’s proposal to manufacture cutting-edge semiconductors using a 3-nanometer process at its second facility in Kumamoto Prefecture. This move will signify Japan’s inaugural domestic production of 3nm-process chips. Under the revised production strategy, the plant is projected to achieve a monthly output of 6,000 wafers for 3nm-process chips. Initially, TSMC had intended to produce semiconductors with 6nm and 12nm processes at this site. The adjustment in production plans is driven by the escalating demand for AI technologies and a strategic pivot toward manufacturing higher-performance products.