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Institution: TSMC Accelerates CoPoS Layout, Trial Production Expected in 2027
1 day ago /
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Author：小编
On June 17, market research firm TrendForce released a report stating that TSMC is focusing on CoPoS (Chip-on-Panel-on-Substrate) technology in the short term, targeting a 310×310mm substrate size. 2026 will be a critical year for the validation of related equipment and material suppliers, with trial production expected to commence in 2027 and formal mass production planned for the second half of 2028. This technology aims to enhance the cost-effectiveness of mass-producing ultra-large AI chips through panel-level packaging, overcoming the physical limitations of traditional wafer-level packaging.
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