Micron Technology is stepping up its efforts to enhance the capacity of its sixth-generation high-bandwidth memory, HBM4. The optimization pace for HBM4 is now twice as fast as that of last year's HBM3 12-layer offerings, accompanied by a notable boost in yield rates. HBM4 is set to be integrated into NVIDIA's AI computing platform, Vera Rubin. The ongoing capacity expansion is leveraging insights from prior-generation products, utilizing a 10nm-class fifth-generation 1β process for core chip fabrication, and refining the base chip design. The forthcoming next-generation HBM4E standard product is scheduled to commence mass production next year. Its core chip will be crafted using a 10nm-class sixth-generation 1γ process and will, for the first time, incorporate ASML's extreme ultraviolet (EUV) lithography technology, while the base chip will be produced by TSMC. Simultaneously, Micron is also in the process of developing custom products tailored to customer needs. Rivals Samsung Electronics and SK Hynix are also in the midst of HBM4E development, employing the 1c process. Samsung aims to dispatch samples in the second quarter of this year, while SK Hynix intends to provide samples in the latter half of the year, with both companies planning to initiate mass production next year. Micron anticipates that by mid-year, shipments of DRAM based on the 1γ process and ninth-generation NAND flash memory products will constitute over half of its total shipments, with 1γ DRAM emerging as the single largest DRAM process in terms of wafer output.