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Recently, Xingyuan Jingsuan has announced its technology roadmap for the development of 1nm heterogeneous integrated high-efficiency computing chips, targeting the year 2030. The objective is to attain an annual production capacity equivalent to 10 terawatts of space-based computing power by around 2030. This innovative technology leverages the high energy efficiency of two-dimensional materials, combined with cutting-edge packaging techniques, to achieve a computing power output on the scale of 10 terawatts within a significantly reduced physical space. This surpasses the energy output efficiency of conventional silicon-based chip factories. A substantial portion of this computing capacity will be strategically positioned in space nodes, offering real-time computational support to devices worldwide via space-to-ground collaborative networks.
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