On March 24, 2026, at the XuanTie RISC-V Ecosystem Conference, which was hosted by Alibaba's Academia Sinica, NationalChip made a significant announcement: it was joining the RISC-V Wujian Alliance and unveiling the 'Wujian Chip Design Platform Custom Edition.' This innovative platform seamlessly merges NationalChip's proprietary, high-performance DPNPU AI acceleration engine and security IP with Academia Sinica's XuanTie high-performance RISC-V CPU, resulting in a holistic RISC-V+AI integrated solution. NationalChip is consistently achieving breakthroughs in end-side and edge-side AI computing capabilities. Its DPNPU architecture IP core boasts an impressive single-core performance of up to 8TOPS, supports multi-core expansion, and is well-suited for low-power AI MCUs and edge computing AI SoC chips. This technology finds broad applications in scenarios such as image recognition and voice noise reduction. Through in-depth architectural collaboration with the XuanTie CPU, the platform is set to offer customers more efficient and agile AI chip design services. This will not only drive the adoption of the RISC-V ecosystem in downstream scenarios but also streamline the design of secure, high-energy-efficiency AI chips.
