The team of Qiu Chenguang and Peng Lianmao from the School of Electronics at Peking University has achieved a remarkable milestone in the realm of non-volatile memory technology by introducing, for the first time, the "Nano-Gate Ultra-Low-Power Ferroelectric Transistor." Through meticulous optimization of the device's architecture and harnessing the amplified impact of electric field concentration at the nano-gate, they have successfully engineered a ferroelectric transistor that operates at an exceptionally low voltage of just 0.6V. This innovation boasts an energy consumption as minimal as 0.45 femtojoules per micrometer (fJ/μm) and features a physical gate length that has been dramatically reduced to a mere 1 nanometer. Consequently, it stands as the smallest and most energy-efficient ferroelectric transistor on the global stage. This groundbreaking accomplishment paves the way for a novel, physically-rooted storage solution, instrumental in the development of high-performance chips operating at sub-1-nanometer nodes and high-computing-power AI chip architectures, heralding tremendous potential for future advancements.