At the Open Innovation Platform Ecosystem Forum, TSMC disclosed its logic process roadmap for the upcoming years, with a key focus on the year 2025. Currently, the FinFET technology process in mass production stands at 3nm, featuring a range of variants such as N3, N3E, N3P, N3X, and N3C. Among them, the N3P variant has commenced mass production in the fourth quarter of 2024, while N3X is set to follow suit in 2025. The 2nm node will embrace the GAA (Gate-All-Around) transistor architecture. The N2 process is anticipated to enter mass production in the latter half of 2025, with the N2P and N2X processes to be introduced subsequently. Furthermore, TSMC has mapped out the A16 SPR process, which integrates backside power delivery technology, with mass production planned post-N2. Looking even further into the future, TSMC has also outlined plans for the A14 process, slated for mass production in 2028. This process is geared towards propelling the artificial intelligence transformation by offering faster computing speeds and enhanced energy efficiency.