Recently, Cadence made a significant announcement regarding notable advancements in the realm of chip design automation and intellectual property (IP). This milestone achievement stems from its enduring partnership with TSMC. Through this collaboration, both entities have co-developed a state-of-the-art design infrastructure, which has substantially reduced the product's time-to-market, thereby catering to the application demands of artificial intelligence (AI) and high-performance computing (HPC) customers.

Cadence and TSMC have forged a close working relationship in domains such as AI-powered electronic design automation (EDA) tools, 3D integrated circuit (3D-IC) design, IP cores, and photonics. Together, they have unveiled numerous globally pioneering semiconductor design solutions. The outcomes of their collaboration encompass: certified AI-driven design processes; the Integrity 3D-IC platform that supports the 3Dblox standard; silicon-validated IP cores (including DDR5, GDDR7, UCIe, etc.) tailored for TSMC's advanced processes; and design assistance for TSMC's COUPE photonic engine technology. These innovations span a broad spectrum, from chiplets to system-level packaging, delivering high-performance, low-power solutions for markets like AI, automotive electronics, and hyperscale computing.