Rapidus' 2nm Process Matches TSMC's Logic Density, Aiming for 2027 Mass Production
2025-09-01 / Read about 0 minute
Author:小编   

The Japanese semiconductor manufacturer Rapidus' cutting-edge 2nm process, dubbed 2HP, stands out in terms of logic density, achieving an impressive 237.31 MTr/mm², which is on par with TSMC's contemporary 2nm process N2 at 236.17 MTr/mm². This achievement signifies that Rapidus has attained a level of chip area utilization comparable to industry leader TSMC. Nevertheless, a holistic evaluation of Rapidus' competitive edge necessitates the consideration of power consumption and performance metrics as well. The company has ambitiously set a target for mass production of 25,000 wafers per month by the year 2027.