Engineers at the University of Hong Kong have built the first cryogenic control chip that operates at the same temperature as superconducting qubits — 10 millikelvin, or just one-hundredth of a degree above absolute zero — without generating the heat that has forced every competing approach to park its electronics hundreds of meters of cable away. The research, led by Professor Yuhao Zhang and PhD student Xin Yang from HKU's Department of Electrical and Computer Engineering and the Centre for Advanced Semiconductors and Integrated Circuits, was published in Nature Communications. It introduces a practical path around the wiring problem that has kept superconducting quantum computers from scaling past a few hundred qubits toward the thousands needed for real-world computational advantage.

Why Quantum Computers Cannot Simply Add More Qubits

Superconducting qubits must be kept at temperatures between 10 and 20 millikelvin to remain coherent — roughly 150 times colder than deep space. The electronics that tell those qubits what to do, however, have not been able to survive that environment. Conventional silicon transistors depend on thermally excited charge carriers to function; at millikelvin temperatures, those carriers freeze out entirely, rendering standard chips inert.

The industry workaround has been to place all control electronics at room temperature and run individual coaxial cables through the dilution refrigerator's thermal stages down to the qubit chip. Each cable is a small but real thermal conductor, and every milliwatt of heat deposited at the coldest stage requires kilowatts of additional cooling power at the facility level. As qubit counts grow, so does the cable count — and the physical bulk, heat load, and engineering complexity grow with it. The available cooling power at the 10–20 mK stage is typically around 30 microwatts; a quantum processor with thousands of qubits and room-temperature electronics would blow through that budget many times over.

Research groups at Delft University, Intel, and others have developed cryo-CMOS chips that operate at around 3 to 4 Kelvin — still cold, but more than 300 times warmer than the qubit stage. Those chips reduce cable runs from room temperature to the 4 K stage, but they still require connections the rest of the way down to the qubits, preserving a version of the same bottleneck. Getting electronics to operate reliably at true millikelvin temperatures has been the harder, unsolved part of the problem.

How SiC Electron-Donor Ionization Solves the Quantum Computing Wiring Bottleneck

The HKU team's solution begins with an industrial material that is about as far from exotic as semiconductor physics gets: silicon carbide (SiC). SiC transistors are the workhorses of electric vehicle inverters and power grid equipment, valued for their ability to handle high voltages and temperatures. Nobody had studied what happens to them at the opposite extreme — temperatures near absolute zero — until Zhang and Yang cooled commercial SiC metal-oxide-semiconductor field-effect transistors (MOSFETs) all the way to the millikelvin regime and watched something unexpected.

At those temperatures, the silicon carbide crystal lattice begins generating a stable, controllable S-shaped negative differential resistance — a condition where increasing voltage across the device causes current to decrease rather than increase, producing a bistable switching behavior. The underlying physics is electron-donor impact ionization, or EDII: at extreme cold, impurity atoms embedded in the SiC crystal lattice release electrons through an avalanche-like ionization process driven by the electric field rather than by heat. By tuning the gate voltage applied to the transistor, the researchers can precisely control the onset and shape of this ionization cascade, producing voltage pulses that closely mimic the action potential — the firing event — of a biological neuron.

Because EDII is an intrinsic property of the crystal lattice itself rather than an engineered thermal effect, it proved stable and highly repeatable across separate manufacturing batches — a critical requirement for any technology aiming at commercial quantum hardware. The team then demonstrated that individual SiC neuromorphic nodes can be cascaded into larger integrated neural networks on a single chip, opening a route to dense, programmable control arrays that operate entirely inside the dilution refrigerator, at the same temperature stage as the qubits themselves.

The energy efficiency advantage is substantial: the SiC neuromorphic blocks dissipate thousands of times less power at cryogenic temperatures than conventional silicon architectures would, keeping deposited heat well within the refrigerator's tight thermal budget and leaving headroom for many more qubits. The team estimates that a fully integrated, scaled version of a single integrate-and-fire neuron would occupy a footprint of approximately 230 square micrometers — compact enough for high-density on-chip arrays.

What This Means for Quantum Error Correction Hardware

One of the most demanding applications for classical compute inside a quantum refrigerator is quantum error correction, or QEC. Fault-tolerant quantum computation requires the continuous, real-time decoding of error syndromes — measurements that reveal which qubits have flipped — and the application of corrective operations before errors cascade. The decoding algorithm must run fast enough to keep up with the qubit's error rate, which typically demands sub-microsecond feedback latency.

Current QEC implementations route syndrome data out of the refrigerator to room-temperature electronics and back, accumulating latency at every thermal interface. Placing a programmable neuromorphic processor at the millikelvin stage — directly adjacent to the qubit chip — could reduce the round-trip decode time by orders of magnitude and remove the bandwidth bottleneck that currently limits how many logical qubits a single refrigerator can support. The HKU team identifies real-time QEC matrix decoding as one of the primary intended applications for the technology, alongside general quantum control algorithms.

The paper also points toward a pathway to quantum systems exceeding 1,000 qubits within conventional fabrication processes — a threshold widely cited by the field as the minimum for many practically useful quantum algorithms, including molecular simulation and certain optimization problems.

SiC Fabrication and the Deep-Space Angle

A strategically important aspect of the HKU platform is what it does not require. Competing cryogenic control architectures based on superconducting single flux quantum logic or quantum-dot electronics demand entirely new fabrication infrastructure that no existing semiconductor foundry currently provides at volume. The SiC neuromorphic chips, by contrast, are built using the same established commercial processes used for automotive and power-electronics supply chains. The researchers state that existing industrial foundries could manufacture these chips on 300-millimeter wafer platforms — the same diameter as mainstream silicon fabs — as SiC wafer production continues to scale up from the 150–200mm sizes currently standard in the power-electronics industry.

Silicon carbide's wide bandgap also gives it radiation hardness and mechanical robustness that silicon cannot match. The HKU team notes that autonomous instruments destined for the lunar surface or the outer solar system face environments where conventional electronics fail and active thermal management is impossible. A chip that operates precisely because of extreme cold, rather than despite it, could enable scientific payloads that must function for months or years in environments far beyond the reach of human repair.

The research comes from an institution that has publicly aligned its quantum science priorities with national development goals in China. The underlying physics, published in Nature Communications and peer-reviewed internationally, is fundamental materials science with no classified applications. Readers in Western research and defense communities will note that HKU operates under Chinese national security law, and that its quantum programs receive state-directed funding — context relevant to technology transfer and export control discussions even when the science itself is openly published.

What Comes Next for Cryogenic Neuromorphic Computing

The Nature Communications paper demonstrates the EDII mechanism, gate-controlled current-voltage sweeps showing the S-shaped NDR, and cascaded spiking waveforms from multi-node networks. The remaining engineering challenges are integration density at full cryogenic stack scale, interconnect design between the neuromorphic control layer and the qubit chip, and — most critically — a demonstration of actual qubit gate operations driven by the SiC chip rather than by room-temperature electronics. That demonstration would move the technology from a compelling physics result toward a validated engineering component ready for insertion into a real quantum processor development program.

The quantum hardware industry is in an unusual moment: McKinsey's Quantum Technology Monitor for 2026 identified manufacturing systems and cryogenic infrastructure as the field's binding constraint, displacing the raw qubit count and error rate challenges that defined the prior decade. GlobalFoundries launched a dedicated quantum manufacturing business unit in May 2026, backed by a proposed $375 million in CHIPS Act funding. Atom Computing demonstrated sustained multi-round error correction on a neutral-atom system in early June. The HKU result arrives as the field is actively searching for the architectural components that will define the next generation of scalable systems — and it arrives via a material that costs roughly the same as the transistors in a car.

Frequently Asked Questions

What is the wiring bottleneck in quantum computing, and why does it matter?

Superconducting qubits must operate at temperatures between 10 and 20 millikelvin to maintain quantum coherence. The classical electronics used to control those qubits have historically been unable to survive those temperatures, forcing engineers to run individual coaxial cables from room-temperature electronics through several thermal stages of a dilution refrigerator down to the qubit chip. Each cable deposits heat at the coldest stage, where the available cooling power is only about 30 microwatts. Adding more qubits requires more cables, more heat, and more physical space — creating a hard scaling ceiling. The wiring bottleneck is the central reason today's most advanced superconducting quantum processors are measured in hundreds of qubits rather than thousands.

How does the HKU silicon carbide chip operate at millikelvin temperatures when standard chips cannot?

Standard silicon transistors rely on thermally excited electrons to conduct current; at millikelvin temperatures, those electrons freeze in place and the device stops working. Silicon carbide MOSFETs behave differently: at extreme cold, impurity atoms in the crystal lattice release electrons through an electric-field-driven process called electron-donor impact ionization, or EDII, which does not depend on thermal energy. The HKU team found that modulating the gate voltage of a commercial SiC transistor can precisely control this ionization cascade, producing rapid switching pulses — mimicking a biological neuron's action potential — needed for programmable control logic. Because EDII is intrinsic to the SiC crystal structure, the effect is stable and repeatable across manufacturing batches.

Why does it matter that the chip uses standard silicon carbide rather than an exotic material?

Competing cryogenic control approaches based on superconducting logic or quantum-dot circuits require fabrication processes that do not yet exist at commercial volume anywhere in the world. Silicon carbide is already manufactured at industrial scale for electric vehicle power inverters and grid equipment. The researchers say existing commercial foundries could produce the cryogenic neuromorphic chips using established SiC processes, potentially without building any new fabrication infrastructure. That compatibility dramatically lowers the barrier to integrating this technology into real quantum hardware development programs.

Can this chip be used for quantum error correction?

Quantum error correction requires extremely fast classical computation — syndrome decoding — to identify and correct qubit errors in real time. Today, that computation happens at room temperature, with data routed out of the refrigerator and back, accumulating latency at every interface. A neuromorphic processor operating at the millikelvin stage, directly adjacent to the qubit chip, could perform syndrome decoding locally and feed back corrections before latency-induced errors accumulate. The HKU team identifies real-time QEC matrix decoding as one of the primary intended applications for the technology, alongside general quantum control algorithms.