
Alice & Bob Founders Theau Peronnin and Raphael Lescanne in front of a cryostat, holding a Quantum Processing Unit. alice-bob.com
Alice & Bob, the Paris-based quantum startup that has spent six years turning Schrödinger's cat into a competitive hardware advantage, launched the Helium Quantum System on June 11, 2026 — the first commercially available, on-premise quantum computing platform built entirely around cat-qubit architecture. For research institutions tired of treating quantum computing as a black-box cloud service, the announcement marks a meaningful shift: a physical system they can own, operate, and instrument at the level of individual qubits.
The central claim is that 18 of Alice & Bob's cat qubits are sufficient to encode a single reliable logical qubit — the kind of error-corrected unit that can actually hold a computation without collapsing. Conventional approaches built on transmon qubits and surface codes require thousands of physical qubits to achieve the same result. Alice & Bob says its architecture cuts that overhead by up to 200 times compared to competing approaches. That figure comes from the company's own theoretical calculations and has not been independently verified against Helium's shipped hardware; AWS's separately published Ocelot chip result, which used a different cat-qubit implementation, claimed up to 90 percent overhead reduction. What is independently confirmed is the underlying physics: a 2020 paper in Nature Physics by co-founder Raphaël Lescanne demonstrated exponential suppression of bit-flip errors in a cat-qubit oscillator, and a 2019 Physical Review X paper by Jérémie Guillaud and Mazyar Mirrahimi at Inria Paris laid out the theoretical architecture that makes a repetition code sufficient.
The name "cat qubit" is not branding. It refers to a qubit whose logical states are two quantum coherent states of a microwave resonator — |α⟩ and |-α⟩, the "alive" and "dead" of a Schrödinger superposition stored in a superconducting circuit. In Alice & Bob's implementation, the resonator (a quarter-wavelength coplanar waveguide) couples via a nonlinear element called an ATS — an asymmetrically threaded SQUID — to a lossy buffer mode. The ATS mediates a process called two-photon dissipation: only pairs of photons can exchange between the memory resonator and the buffer, never single photons. Because a bit-flip error — the jump from |α⟩ to |-α⟩ — requires a single-photon event, it is structurally forbidden by this engineered dissipation. As the average photon number (α²) in the resonator grows, the probability of a bit-flip decreases exponentially.
The tradeoff is precise and important: phase-flip errors, which corrupt the quantum phase of the superposition, are not suppressed. They increase linearly with α². This asymmetric error profile — bit-flips rare, phase-flips manageable — is exactly what Alice & Bob's architecture exploits. Because only one type of error dominates, a simple one-dimensional repetition code can handle it, rather than the two-dimensional surface code that conventional transmon computers require. Helium's 18-cat-qubit array is implementing that two-layer architecture: the hardware layer eliminates bit-flips; the software and control layer corrects the residual phase-flips. The result is a system that uses far fewer physical components than a surface-code machine targeting the same logical qubit fidelity.
Critically, this means Helium is not claiming to deliver a standalone fault-tolerant logical qubit. It is delivering the hardware that makes fault tolerance tractable at much lower physical qubit counts, with the error-correction protocol as the necessary second layer. Researchers deploying Helium will be co-developing exactly those protocols.
The system is a self-contained quantum computing appliance: a dilution refrigerator holding the cat-qubit processor, classical control electronics, all cabling, and a software stack that runs the quantum-HPC integration. It consumes approximately 40 kilowatts — substantially below the power requirements of competing superconducting systems, Alice & Bob says, though no independent comparison has been published.
Alongside the hardware, Alice & Bob released Starboard, a monitoring interface that gives operators real-time visibility into individual qubit coherence, live telemetry from the dilution refrigerator rack, and workload scheduling across the system. The platform connects to existing HPC infrastructure through the open-source QRMI library, which provides Slurm compatibility — the dominant job scheduler at supercomputing centers — making Helium a machine that can sit inside a national lab's existing computing stack rather than beside it.
The chip inside is built on the Galvanic Cat design, the same architecture behind Alice & Bob's most recent single-qubit result: in September 2025, the company measured bit-flip lifetimes of 33 to 60 minutes at a 95 percent confidence interval on the Galvanic Cat — four times longer than the 13-minute stability threshold required for the company's 2030 fault-tolerant roadmap. Scaling that single-qubit result to an 18-qubit array while maintaining coherence and executing two-qubit gate operations is the engineering challenge Helium's research partners will be working on.
Read more: Quantum Computing Fault Tolerance: Microsoft Majorana 2, QuiX, Japan Move Past Qubit Counts
In a standard transmon qubit — the architecture used by IBM, Google, and most of the field — the qubit is encoded in the two lowest energy levels of an anharmonic superconducting circuit. Both bit-flip and phase-flip errors occur at similar rates, driven by thermal noise and electromagnetic interference. To build a reliable logical qubit, a surface code arranges these transmons in a two-dimensional grid, using d² physical qubits to encode one logical qubit and running continuous syndrome measurements. At the error rates achievable today, estimates for a single logical qubit meeting fault-tolerance thresholds range from roughly 1,000 to over 100,000 physical transmons, depending on the target logical error rate.
Cat qubits attack this problem at the physics layer rather than the software layer. By making bit-flip errors exponentially unlikely through engineered dissipation, the architecture allows a simpler one-dimensional code — a repetition code — to handle the remaining phase-flip errors. The code overhead scales very differently: Guillaud and Mirrahimi's 2019 Physical Review X paper proposed that a repetition code on cat qubits could achieve fault tolerance with far fewer physical elements than surface codes on transmons. Whether Helium's specific 18-qubit implementation achieves those theoretical projections in practice will depend on the gate fidelity the system demonstrates under real operating conditions — particularly for two-qubit CNOT gates, which are harder to execute while preserving the noise-bias advantage.
Helium is explicitly a single-logical-qubit research platform. Alice & Bob's roadmap names two subsequent systems: Lithium, expected to feature 48 cat qubits with multiple logical qubits, and Beryllium, adding further scale. The endpoint is the Graphene platform, targeting 100 logical qubits by 2030 — a machine the company believes could demonstrate the first commercially useful applications in materials science and drug discovery simulation.
That 2030 target places Alice & Bob in a crowded race. Microsoft has set the same year as a target for its Majorana-based topological approach; IBM is targeting its Starling system for 2029; IonQ is scaling its trapped-ion architecture in parallel. Each company is betting on a different underlying physics to minimize the physical qubit overhead. Alice & Bob's bet is that the noise bias of cat qubits, now translated from theory into shipping hardware, is the path that gets there with the fewest components.
The company has backing consistent with that ambition: a €100 million Series B closed in January 2025, expanded in May 2026 with a strategic investment from NVentures — NVIDIA's venture arm — and aligned with President Emmanuel Macron's announcement of an additional €1 billion for France's Plan Quantique sovereign quantum strategy. Alice & Bob is one of five hardware developers selected under PROQCIMA, the French Ministry of Armed Forces' procurement framework, which has set a milestone target of 128 logical qubits by 2030. DARPA selected the company for its Quantum Benchmarking Initiative, which independently evaluates which architectural approaches can plausibly reach industrial usefulness.
A technically literate reader should leave with a precise understanding of where cat qubits stop. Bit-flip suppression is exponential and robust — this is the experimentally confirmed advantage. Phase-flip suppression is not analogous; it grows only linearly with photon number, meaning that as you push α² higher to improve bit-flip resistance, phase-flip errors increase proportionally. The outer repetition code handles them, but the code's complexity grows with the phase-flip rate. The deep technical question for Helium's research partners is whether the two-qubit gates — particularly the CNOT — can be performed while preserving the noise-bias structure. If gate operations introduce symmetric errors (both bit-flip and phase-flip components), the advantage over surface codes diminishes. Alice & Bob's CTO Raphaël Lescanne noted in September 2025 that evaluating CNOT performance under the two-photon dissipation regime is the next experimental priority after the bit-flip stability milestone.
A second practical constraint is each cat qubit's hardware footprint. Unlike a transmon, which is a single nonlinear circuit, each cat qubit requires a storage resonator and a buffer mode coupled through the ATS element — a larger physical structure per qubit. The theoretical overhead saving comes from needing far fewer of them, but the chip layout and fabrication are more complex per unit. Alice & Bob opened a €50 million quantum cleanroom in Paris in March 2026 to address exactly this manufacturing challenge.
What is a cat qubit and how does it reduce quantum error correction overhead?
A cat qubit encodes quantum information in two coherent microwave states of a superconducting resonator, stabilized by a process called two-photon dissipation that makes one class of error — bit-flips — exponentially unlikely. Because bit-flip errors are suppressed by the hardware itself, a simple one-dimensional repetition code can handle the remaining phase-flip errors, rather than the two-dimensional surface code that conventional transmon qubits require. This means fewer physical components are needed to build a reliable logical qubit.
How does Helium's 18-qubit claim compare to other quantum systems?
Conventional fault-tolerant quantum computing approaches using transmon qubits and surface codes require roughly 1,000 to more than 100,000 physical qubits per logical qubit, depending on the target error rate. Alice & Bob claims its cat-qubit architecture can encode a logical qubit in as few as 18 physical cat qubits. This figure is the company's own design target and has not yet been independently verified against Helium's shipped hardware.
What is on-premise quantum computing, and why does it matter for research?
On-premise quantum computing means owning and operating a quantum system at your own facility rather than accessing one remotely through a cloud interface. For research institutions, it provides direct hardware control, the ability to modify error-correction protocols in real time, and visibility into individual qubit performance — capabilities not available through cloud access. Alice & Bob's Helium includes the Starboard interface, which tracks coherence metrics and telemetry for each of the 18 cat qubits.
What are the current limitations of cat-qubit hardware?
Cat qubits eliminate bit-flip errors by design but do not suppress phase-flip errors — those still require a classical outer code. Two-qubit gate operations, particularly CNOT gates, must be engineered to preserve the noise-bias advantage; if gate operations introduce symmetric errors, the overhead benefit over surface codes diminishes. Each cat qubit also requires a larger chip footprint than a transmon, with a storage resonator and a buffer mode per physical qubit.
