At the 62nd Design Automation Conference (DAC 2025), a team from the School of Integrated Circuit Science and Engineering at Huazhong University of Science and Technology, led by Professors Miao Xiangshui and Li Yi, unveiled their groundbreaking research titled "ReSMiPS." This study explores the integration of memory and computation using Resistive Random Access Memory (ReRAM), offering a highly energy-efficient and precise in-memory computing architecture tailored for solving sparse matrix equations. This innovation addresses the memory access bottleneck traditionally encountered by digital solvers when tackling large-scale sparse matrix equations.

The research team has developed ReSMiPS, a mixed-precision heterogeneous in-memory computing architecture leveraging ReRAM. By introducing the Fast Sparse Matrix Reordering (FSMR) algorithm and the innovative IF64 data mapping format, they have significantly enhanced array utilization and computational parallelism, while minimizing hardware resource overhead. This achievement not only surpasses the limitations of ReRAM in-memory computing technology in solving high-precision sparse matrix equations but also presents a viable hardware acceleration solution for critical applications, including future chip design automation and digital twins.