Semiconductor Chip Testing and Packaging Facility Establishes in Chancheng, Foshan
2 day ago / Read about 0 minute
Author:小编   

Phase I of the project will primarily concentrate on the packaging of high-performance Wire Bond computing, logic, memory chips, and flip-chip technology. Moving forward, Phase II will broaden its scope to include advanced packaging technologies, such as bump packaging and through-silicon via (TSV).