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TSMC Achieves Milestone: Revolutionary Chip Hits 1000W Power Consumption with 40x Performance Boost, Setting New Records
2025-04-25 /
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Author：小编
TSMC is pushing the frontiers of chip size and performance with its groundbreaking CoWoS packaging technology. The interposer area has been expanded to an impressive 2831 square millimeters, with further plans to scale it up to 7885 square millimeters to accommodate an increased number of compute chips and HBM memory. To tackle the challenges of high power consumption and heat generation, TSMC is set to integrate advanced power management ICs and develop efficient liquid cooling solutions. Additionally, the industry must establish new OAM standards to cater to the demands of these large-scale chips and propel the development of high-performance computing forward.
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