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On October 12, 2026, SK Hynix unveiled the specific architecture and performance of its self-developed SSD-dedicated processor, H-TPU, at the ISOCC 2026 conference. The H-TPU significantly reduces power consumption and chip area by assigning repetitive tasks handled by general-purpose CPUs to approximately 100 small processors. The processor adopts a four-stage pipeline and sequential execution architecture, making it suitable for handling repetitive workloads such as read/write commands, metadata management, and buffer control. SK Hynix plans to apply H-TPU technology to next-generation enterprise solid-state drive (eSSD) controllers and various NAND flash memory product lines, as well as to the next-generation AI storage architecture, Storage Next, which is optimized for fine-grained data access required by AI models.
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