On April 13, 2026, Rapidus, a leading advanced semiconductor manufacturer in Japan, made a significant announcement regarding the official launch of its semiconductor packaging process pilot line. This cutting-edge facility is situated within Seiko Epson's Chitose plant in Chitose City, Hokkaido. The pilot line stands as the linchpin of Rapidus Chiplet Solutions' R&D hub, having already completed small-scale trial runs of 600mm×600mm RDL interposer products.

Rapidus has ambitious plans to revolutionize AI chip production efficiency, aiming to boost it by more than tenfold through the integration of groundbreaking technologies. By employing square glass substrates measuring 600mm on each side, the company seeks to minimize material wastage. The ultimate goal is to commence mass production of 2nm process technology in the latter half of FY2027, with an initial monthly output of 6,000 wafers. This figure is expected to surge to 25,000 wafers within a year of volume production initiation.

In a parallel development, on April 11, Rapidus also inaugurated an advanced analysis center. This facility is equipped to carry out comprehensive physical, environmental and chemical, electrical characterization, and reliability testing. The Japanese government is showing unwavering support for Rapidus' endeavors, having recently approved an additional 631.5 billion yen in funding. This brings the total cumulative R&D support from FY2022 to FY2026 to a staggering 2.354 trillion yen.

Rapidus, established in late 2022 as a joint venture among eight Japanese industry giants, including Toyota and Sony, is at the forefront of next-generation semiconductor R&D and production. With its innovative approach and strong government backing, Rapidus is poised to make significant strides in the semiconductor industry.