Recently, the 73rd International Solid-State Circuits Conference (ISSCC 2026)—often hailed as the "International Olympics of Chip Design"—took place in San Francisco, USA. As a premier international forum in the realm of integrated circuits, the School of Integrated Circuits at Nanjing University had the distinction of having two high-caliber papers selected for presentation at this year's event.
Among these, the team helmed by Professors Du Yuan and Du Li, in partnership with T-Head (Shanghai) Semiconductor Co., Ltd., made a significant leap forward in the domain of high-speed interconnects. Their pioneering research, titled [insert title here], successfully established a new global benchmark for ultra-high edge bandwidth density, achieving an impressive 47.0Tb/s/mm. This groundbreaking technology has been instrumental in advancing the development of AI computing chiplets and HBM memory chiplet interfaces, offering crucial technological backing for domestic AI chips to stand toe-to-toe with international front-runners.
Furthermore, another paper from Nanjing University delved into cutting-edge advancements within the integrated circuits field, underscoring the institution's innovative prowess in chip design.