Intel has, for the first time, publicly presented the prototype of ZAM (Z-angle memory). This technology, co-developed by Intel and Saimemory, a subsidiary of SoftBank, boasts a maximum single-chip capacity of 512GB. In comparison with mainstream HBM memory, it cuts power consumption by 40% to 50%, with the ambition to shatter HBM's dominance. ZAM utilizes an interlaced interconnection topology to realize diagonal "Z-shaped" routing within the chip stack. Furthermore, it incorporates copper-copper hybrid bonding technology for efficient inter-chip layer integration. Moreover, its capacitor-less design, along with Intel's well-established EMIB interconnection technology, facilitates high-speed connectivity with AI chips while dramatically decreasing chip thermal resistance. The technology is anticipated to wrap up prototype development by the fiscal year 2027 and reach commercialization by the fiscal year 2029, providing a low-power, high-capacity memory solution for AI data centers.