TSMC Unveils Plan to Manufacture 3-Nanometer Chips at Its Kumamoto Plant in Japan
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Author:小编   

On February 5, TSMC's Chairman, Mark Liu, made an announcement stating that the company's second facility in Kumamoto, Japan, is set to transition to the production of cutting-edge 3-nanometer semiconductors. TSMC is slated to engage in discussions with Japanese authorities regarding this new production strategy, with the anticipated total investment projected to rise to $17 billion. Initially, the second plant in Kumamoto was earmarked for a $12.2 billion investment aimed at manufacturing semiconductors with a range of 6 to 12 nanometers. During TSMC's earnings call in January, the company disclosed that construction of its second wafer fabrication plant in Japan had already commenced, and that decisions regarding technology and capacity enhancements would be contingent upon customer requirements and prevailing market conditions. At present, TSMC is actively producing 3-nanometer chips in Taiwan and has outlined plans to initiate production of these advanced chips at its second wafer fabrication facility in Arizona, USA, by 2027.