Boosting the integration density of Hall devices within quantum resistance chips is crucial for realizing multiple resistance values. Yet, the influence of reducing device size on the performance of graphene-based quantum resistors has not been thoroughly investigated. A research group from the Shanghai Institute of Microsystem and Information Technology, affiliated with the Chinese Academy of Sciences, constructed Hall devices with diverse channel widths on an identical graphene single-crystal substrate. Their findings indicated that narrowing the width results in a higher magnetic field strength being necessary to attain full quantization. By conducting Fermi velocity measurements and ARPES analysis, the team discovered that alterations in the band structure and electron-electron interactions are the main factors contributing to the size-dependent effect. Further in-depth analysis, incorporating machine learning techniques, pinpointed an optimal channel width of around 360 μm as the equilibrium point between minimizing resistance value uncertainty and maximizing device integration density. Based on these insights, they developed a graphene quantum resistor array with an output value of 8.604 kΩ. This array reaches the quantization plateau under a magnetic field of roughly ±1.5 T and attains a minimum uncertainty of 3.0×10⁻⁸ at a current of 85 μA. This research offers vital perspectives for the design of high-performance, multi-value quantum resistance devices.