Recently, the research team headed by Professor Wang Guoxing from the School of Integrated Circuits at Shanghai Jiao Tong University has made remarkable strides in the realm of wideband high-precision analog-to-digital converter chip design. Their pertinent research findings have been published in the prestigious IEEE Journal of Solid-State Circuits (JSSC). The chip, manufactured using a 28nm CMOS process, attains a Signal-to-Noise-and-Distortion Ratio (SNDR) of 71.5dB and a dynamic range of 77.3dB, positioning it at an internationally leading standard.
